EricR Lai has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/61655 )
Change subject: soc/intel/common/gpio: Add PAD_NC_LOCK support ......................................................................
soc/intel/common/gpio: Add PAD_NC_LOCK support
Add PAD_NC_LOCK marco to support mainboard lock needs for NC pins.
BUG=b:216583542 TEST=build passed
Signed-off-by: Eric Lai ericr_lai@compal.corp-partner.google.com Change-Id: Ie44d72f4152b55183d900228df3e3670358f7518 --- M src/soc/intel/common/block/include/intelblocks/gpio_defs.h 1 file changed, 8 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/61655/1
diff --git a/src/soc/intel/common/block/include/intelblocks/gpio_defs.h b/src/soc/intel/common/block/include/intelblocks/gpio_defs.h index d9d882c..27c6619 100644 --- a/src/soc/intel/common/block/include/intelblocks/gpio_defs.h +++ b/src/soc/intel/common/block/include/intelblocks/gpio_defs.h @@ -364,6 +364,14 @@ PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), \ PAD_PULL(pull) | PAD_IOSSTATE(TxDRxE))
+/* No Connect configuration with lock */ +#define PAD_NC_LOCK(pad, pull, lock_action) \ + _PAD_CFG_STRUCT_LOCK(pad, \ + PAD_RESET(PWROK) | PAD_FUNC(GPIO) | \ + PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), \ + PAD_PULL(pull) | PAD_IOSSTATE(TxDRxE), \ + PAD_LOCK(lock_action)) + /* General purpose input, routed to APIC */ #define PAD_CFG_GPI_APIC(pad, pull, rst, trig, inv) \ _PAD_CFG_STRUCT(pad, \