[coreboot-gerrit] Change in coreboot[master]: soc/intel/tigerlake: Update DCACHE_BSP_STACK_SIZE

[Subrata Banik (Code Review)]

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39706 )

Change subject: soc/intel/tigerlake: Update DCACHE_BSP_STACK_SIZE
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Patch Set 1:

(1 comment)

https://review.coreboot.org/c/coreboot/+/39706/1/src/soc/intel/tigerlake/Kco... 
File src/soc/intel/tigerlake/Kconfig:

https://review.coreboot.org/c/coreboot/+/39706/1/src/soc/intel/tigerlake/Kco... 
PS1, Line 87: 0x40400
> > I have not seen the Integration Guide for JSL. […]

Looks like JSL still has lesser requirement as per FSP integration guide

config DCACHE_BSP_STACK_SIZE
    hex
    default 0x30400 if SOC_INTEL_JASPERLAKE
        default 0x40400 if SOC_INTEL_TIGERLAKE

can you please help to make required changes ?