[coreboot-gerrit] Change in coreboot[master]: nb/intel/pineview: Convert to ASL 2.0 syntax

[Angel Pons (Code Review)]

Angel Pons has submitted this change. ( https://review.coreboot.org/c/coreboot/+/43168 )

Change subject: nb/intel/pineview: Convert to ASL 2.0 syntax
......................................................................

nb/intel/pineview: Convert to ASL 2.0 syntax

Tested with BUILD_TIMELESS=1, Foxconn D41S does not change.

Change-Id: Ibc0988c4c86f7ffef8692ff3cf3ebd92235156b5
Signed-off-by: Angel Pons 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43168
Reviewed-by: Arthur Heymans 
Reviewed-by: HAOUAS Elyes 
Reviewed-by: Frans Hendriks 
Tested-by: build bot (Jenkins) 
---
M src/northbridge/intel/pineview/acpi/hostbridge.asl
1 file changed, 2 insertions(+), 2 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  HAOUAS Elyes: Looks good to me, approved
  Arthur Heymans: Looks good to me, approved
  Frans Hendriks: Looks good to me, approved

diff --git a/src/northbridge/intel/pineview/acpi/hostbridge.asl b/src/northbridge/intel/pineview/acpi/hostbridge.asl
index 0a9897c..dae0b77 100644
--- a/src/northbridge/intel/pineview/acpi/hostbridge.asl
+++ b/src/northbridge/intel/pineview/acpi/hostbridge.asl
@@ -208,8 +208,8 @@
     * Enter actual TOLUD. The TOLUD register contains bits 27-31 of
     * the top of memory address.
     */
-	ShiftLeft (^MCHC.TLUD, 27, PMIN)
-	Add(Subtract(PMAX, PMIN), 1, PLEN)
+	PMIN = ^MCHC.TLUD << 27
+	PLEN = PMAX - PMIN + 1

Return (MCRS)
 }