Sumeet R Pawnikar has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/71641 )
Change subject: mb/google/brya/var/skolas: Set tcc_offset value to 3 ......................................................................
mb/google/brya/var/skolas: Set tcc_offset value to 3
Thermal team has determined that the TCC circuit trip temperature should be set to 97C, because the offset is subtracted from 100C, set the `tcc_offset` register in the devicetree to 3.
Signed-off-by: Sumeet Pawnikar sumeet.r.pawnikar@intel.com Change-Id: Ic9b2b171390de16e4a8e73b4271e2531244ad169 --- M src/mainboard/google/brya/variants/baseboard/skolas/devicetree.cb 1 file changed, 15 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/71641/1
diff --git a/src/mainboard/google/brya/variants/baseboard/skolas/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/skolas/devicetree.cb index 6ca0c9e..139fd71 100644 --- a/src/mainboard/google/brya/variants/baseboard/skolas/devicetree.cb +++ b/src/mainboard/google/brya/variants/baseboard/skolas/devicetree.cb @@ -17,7 +17,7 @@ # DPTF enable register "dptf_enable" = "1"
- register "tcc_offset" = "10" # TCC of 90 + register "tcc_offset" = "3" # TCC of 97
# Enable CNVi BT register "cnvi_bt_core" = "true"