[coreboot-gerrit] Change in coreboot[master]: security/tpm/tss: Add support for PTT

[Christian Walter (Code Review)]

Christian Walter has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34381 )

Change subject: security/tpm/tss: Add support for PTT
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Patch Set 15:

(1 comment)

https://review.coreboot.org/c/coreboot/+/34381/12/src/security/tpm/tss/tcg-2... 
File src/security/tpm/tss/tcg-2.0/tss.c:

https://review.coreboot.org/c/coreboot/+/34381/12/src/security/tpm/tss/tcg-2... 
PS12, Line 195: 	if (CONFIG(HAVE_INTEL_PTT)) {
> [not resolved]

I'm not sure about whether tis_open or tis_init would fail or not. The Intel PTT BIOS Writers Guide states that this should be done prior sending a TPM Command. But anyways - we can move it from the TSS Layer to the TIS Layer if that is fine with everyone.

My point was, that if Intel decides to support more interface (because logically the ME sits in the SB, which is also connected via LPC - so LPC would also be an option here), we have to integrate this into more interfaces.