[coreboot-gerrit] Change in coreboot[master]: [Try] mb/jetway/nf81-t56n-lf: Switch away from ROMCC_BOOTBLOCK

[HAOUAS Elyes (Code Review)]

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37750 )

Change subject: [Try] mb/jetway/nf81-t56n-lf: Switch away from ROMCC_BOOTBLOCK
......................................................................

[Try] mb/jetway/nf81-t56n-lf: Switch away from ROMCC_BOOTBLOCK

Untested.

Change-Id: Iefecd38d975404b25554ecd232ab40367f35bc3a
Signed-off-by: Elyes HAOUAS 
---
M src/mainboard/jetway/nf81-t56n-lf/Kconfig
M src/mainboard/jetway/nf81-t56n-lf/Makefile.inc
R src/mainboard/jetway/nf81-t56n-lf/bootblock.c
3 files changed, 4 insertions(+), 5 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/37750/1

diff --git a/src/mainboard/jetway/nf81-t56n-lf/Kconfig b/src/mainboard/jetway/nf81-t56n-lf/Kconfig
index 95d3b7e..d2dda67 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/Kconfig
+++ b/src/mainboard/jetway/nf81-t56n-lf/Kconfig
@@ -18,7 +18,6 @@

config BOARD_SPECIFIC_OPTIONS
    def_bool y
-	select ROMCC_BOOTBLOCK
    select CPU_AMD_AGESA_FAMILY14
    select NORTHBRIDGE_AMD_AGESA_FAMILY14
    select SOUTHBRIDGE_AMD_CIMX_SB800
diff --git a/src/mainboard/jetway/nf81-t56n-lf/Makefile.inc b/src/mainboard/jetway/nf81-t56n-lf/Makefile.inc
index ba56286..bf86007 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/Makefile.inc
+++ b/src/mainboard/jetway/nf81-t56n-lf/Makefile.inc
@@ -20,6 +20,8 @@
 pci$(stripped_ahcibios_id).rom-type := optionrom
 endif

+bootblock-y += bootblock.c
+
 romstage-y += buildOpts.c
 romstage-y += BiosCallOuts.c
 romstage-y += OemCustomize.c
diff --git a/src/mainboard/jetway/nf81-t56n-lf/romstage.c b/src/mainboard/jetway/nf81-t56n-lf/bootblock.c
similarity index 87%
rename from src/mainboard/jetway/nf81-t56n-lf/romstage.c
rename to src/mainboard/jetway/nf81-t56n-lf/bootblock.c
index 5e61bdd..5ecfaf7 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/romstage.c
+++ b/src/mainboard/jetway/nf81-t56n-lf/bootblock.c
@@ -14,16 +14,14 @@
  * GNU General Public License for more details.
  */

-#include <northbridge/amd/agesa/state_machine.h>
+#include <bootblock_common.h>
 #include <superio/fintek/common/fintek.h>
 #include <superio/fintek/f71869ad/f71869ad.h>
-#include <sb_cimx.h>

/* Ensure Super I/O config address (i.e., 0x2e or 0x4e) matches that of devicetree.cb */
 #define SERIAL_DEV PNP_DEV(0x2e, F71869AD_SP1)

-void board_BeforeAgesa(struct sysinfo *cb)
+void bootblock_mainboard_early_init(void)
 {
-	sb_Poweron_Init();
    fintek_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
 }