[coreboot-gerrit] Patch merged into coreboot/master: arm64: Implement generic stage transitions for non-Tegra SoCs

the following patch was just integrated into master:
commit 66a476ad5f29553ad7c46e58eb35faa7a059a5af
Author: Julius Werner 
Date:   Mon Oct 12 16:45:21 2015 -0700

arm64: Implement generic stage transitions for non-Tegra SoCs

The existing arm64 architecture code has been developed for the Tegra132
    and Tegra210 SoCs, which only start their ARM64 cores in ramstage. It
    interweaves the stage entry point with code that initializes a CPU (and
    should not be run again if that CPU already ran a previous stage). It
    also still contains some vestiges of SMP/secmon support (such as setting
    up stacks in the BSS instead of using the stage-peristent one from
    memlayout).

This patch splits those functions apart and makes the code layout
    similar to how things work on ARM32. The default stage_entry() symbol is
    a no-op wrapper that just calls main() for the current stage, for the
    normal case where a stage ran on the same core as the last one. It can
    be overridden by SoC code to support special cases like Tegra.

The CPU initialization code is split out into armv8/cpu.S (similar to
    what arm_init_caches() does for ARM32) and called by the default
    bootblock entry code. SoCs where a CPU starts up in a later stage can
    call the same code from a stage_entry() override instead.

The Tegra132 and Tegra210 code is not touched by this patch to make it
    easier to review and validate. A follow-up patch will bring those SoCs
    in line with the model.

BRANCH=None
    BUG=None
    TEST=Booted Oak with a single mmu_init()/mmu_enable(). Built Ryu and
    Smaug.

Change-Id: I28302a6ace47e8ab7a736e089f64922cef1a2f93
    Signed-off-by: Julius Werner 
    Reviewed-on: http://review.coreboot.org/12077
    Tested-by: build bot (Jenkins)
    Reviewed-by: Aaron Durbin

See http://review.coreboot.org/12077 for details.

-gerrit