Attention is currently required from: Nick Vaccaro, Subrata Banik.
Michał Żygowski has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/78413?usp=email )
Change subject: soc/intel/alderlake: Fix incorrect ucode comments ......................................................................
soc/intel/alderlake: Fix incorrect ucode comments
The microcode for RPL-S C0 and H0 is actually available, however the name of the file contained a typo: 06-b7-05 vs 06-bf-05. Fix the typos in the comments.
Moreover, the ADL-S C0/H0 microcode file 06-97-05 has the same sha256 sum as the equivalent RPL-S C0/H0 microcode file 06-bf-05. The sha256 sum of ADL-S/RPL-S C0/H0 micorcode on intel-microcode tag microcode-20230808:
5d8d4a4d5456c43b7cc04937c80aec094ccbf3bd89f34ffa5182913ef944a9f9
So there is no need to add separate files for ADL and RPL SKUs.
Change-Id: I4c848e0dfc40f6c8e26a9b31e7c4cf4c5a09128f Signed-off-by: Michał Żygowski michal.zygowski@3mdeb.com --- M src/soc/intel/alderlake/Makefile.inc 1 file changed, 2 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/78413/1
diff --git a/src/soc/intel/alderlake/Makefile.inc b/src/soc/intel/alderlake/Makefile.inc index 1da9b38..55fc83ea 100644 --- a/src/soc/intel/alderlake/Makefile.inc +++ b/src/soc/intel/alderlake/Makefile.inc @@ -78,11 +78,11 @@ ifeq ($(CONFIG_SOC_INTEL_ALDERLAKE_PCH_S),y) # 06-97-00, 06-97-01, 06-97-04 are ADL-S Engineering Samples # 06-97-02 are ADL-S/HX Quality Samples but also ADL-HX Engineering Samples -# ADL-S/HX C0 and ADL-S H0 +# 06-b7-00 are RPL-S Engineering Samples +# ADL-S/HX C0/H0 and RPL-S C0/H0 cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-97-05 # RPL-S/HX B0 cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-b7-01 -# 06-b7-00, 06-b7-02, 06-b7-05 RPL-S/HX A0, C0 and H0 missing else ifeq ($(CONFIG_SOC_INTEL_ALDERLAKE_PCH_N),y) cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-be-00 else