Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37682 )
Change subject: arch/x86,soc/intel: Drop RESET_ON_INVALID_RAMSTAGE_CACHE ......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/c/coreboot/+/37682/4/src/lib/prog_loaders.c File src/lib/prog_loaders.c:
https://review.coreboot.org/c/coreboot/+/37682/4/src/lib/prog_loaders.c@88 PS4, Line 88: if (!CONFIG(TSEG_STAGE_CACHE) && !CONFIG(CBMEM_STAGE_CACHE))
Either I am doing it wrong, or we are hitting Kconfig restriction. It's not a three-way choice and NO_STAGE_CACHE would be better named DISABLE_STAGE_CACHE.
In other words, we NO_STAGE_CACHE will not be set in the case user, by menu option, leaves CBMEM_STAGE_CACHE not enabled.
So I understand correctly: You are trying to handle the following case?
NO_STAGE_CACHE=n TSEG_STAGE_CACHE=n CBMEM_STAGE_CACHE=n
If so, can we update the Kconfig options to handle that scenario? Below is what we have. We could stop exposing it to the user or make it a choice selection like you noted? It seems somewhat orthogonal to removing RESET_ON_INVALID_RAMSTAGE_CACHE on its own. It seems we're putting two different changes together.
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config TSEG_STAGE_CACHE
-------bool -------default y -------depends on !NO_STAGE_CACHE && SMM_TSEG -------help ------- The option enables stage cache support for platform. Platform ------- can stash copies of postcar, ramstage and raw runtime data ------- inside SMM TSEG, to be restored on S3 resume path.
config CBMEM_STAGE_CACHE
-------bool "Cache stages in CBMEM" -------depends on !NO_STAGE_CACHE && !TSEG_STAGE_CACHE -------help ------- The option enables stage cache support for platform. Platform ------- can stash copies of postcar, ramstage and raw runtime data ------- inside CBMEM.
------- While the approach is faster than reloading stages from boot media ------- it is also a possible attack scenario via which OS can possibly ------- circumvent SMM locks and SPI write protections.
------- If unsure, select 'N'
config NO_STAGE_CACHE
-------bool -------default y if !HAVE_ACPI_RESUME || !RELOCATABLE_RAMSTAGE -------help ------- Do not save any component in stage cache for resume path. On resume, ------- all components would be read back from CBFS again.