[coreboot-gerrit] Change in coreboot[master]: soc/intel/cannonlake: Move GPIO PM configuration to soc level

[EricR Lai (Code Review)]

EricR Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37685 )

Change subject: soc/intel/cannonlake: Move GPIO PM configuration to soc level
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Patch Set 17:

(1 comment)

Change Buffer to Package that can apply Integer. So we don't do any convert. Verified the PM bits when enter OS, before s0ix and after. Also verify after Enable PM bits as well. The result  is good :) Merry X'max to you all.

https://review.coreboot.org/c/coreboot/+/37685/16/src/soc/intel/cannonlake/a... 
File src/soc/intel/cannonlake/acpi/gpio.asl:

https://review.coreboot.org/c/coreboot/+/37685/16/src/soc/intel/cannonlake/a... 
PS16, Line 172: 		GPMB[Local0] = PCRR (Local1, GPIO_MISCCFG)
> to be fixed here

Done