Attention is currently required from: Eric Lai, Nick Vaccaro, Subrata Banik.
Weimin Wu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/79165?usp=email )
Change subject: mb/google/brya/var/anraggar: Fix Type-C & DP functions ......................................................................
mb/google/brya/var/anraggar: Fix Type-C & DP functions
Due to TCPC0 & TCPC1 exchanged compare to Neried design.
BUG=b:304920262 TEST=Tpye-C & DP functions workable
Change-Id: I9dacf06b1e672575a684856acdb10b6c88360b18 Signed-off-by: wuweimin wuweimin@huaqin.corp-partner.google.com --- M src/mainboard/google/brya/variants/anraggar/overridetree.cb 1 file changed, 4 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/79165/1
diff --git a/src/mainboard/google/brya/variants/anraggar/overridetree.cb b/src/mainboard/google/brya/variants/anraggar/overridetree.cb index 6ba43c3..cfb77da 100644 --- a/src/mainboard/google/brya/variants/anraggar/overridetree.cb +++ b/src/mainboard/google/brya/variants/anraggar/overridetree.cb @@ -364,8 +364,8 @@ end device ref pch_espi on chip ec/google/chromeec - use conn0 as mux_conn[0] - use conn1 as mux_conn[1] + use conn0 as mux_conn[1] + use conn1 as mux_conn[0] device pnp 0c09.0 on end end end @@ -373,12 +373,12 @@ chip drivers/intel/pmc_mux device generic 0 on chip drivers/intel/pmc_mux/conn - use usb2_port1 as usb2_port + use usb2_port2 as usb2_port use tcss_usb3_port1 as usb3_port device generic 0 alias conn0 on end end chip drivers/intel/pmc_mux/conn - use usb2_port2 as usb2_port + use usb2_port1 as usb2_port use tcss_usb3_port2 as usb3_port device generic 1 alias conn1 on end end