Christian Walter has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34640 )
Change subject: tegra210: Increase size of verstage due to overflow ......................................................................
Patch Set 6:
Patch Set 4:
Are the PTT changes causing the overflow? They really shouldn't, since tegra210 shouldn't have it enabled. How big exactly is the verstage before and after the PTT change?
To be honest - I got no clue. The size of the .elf file is 105300 in both cases. The .debug file is bigger with the VBOOT Changes from the other patch, but still it should have no effect here. Can I safely decrease the size of the CBFS_CACHE from 32 to 30? That would at least solve the problem. Or how can I check the compressed size of the verstage?