[coreboot-gerrit] Patch set updated for coreboot: 4e0f3ce ARM: Define custom ELF headers for ARM.

[Gabe Black]

Gabe Black ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3580

-gerrit

commit 4e0f3ce6a31e831870b590d62c1bf23eb5bac0e4
Author: Gabe Black 
Date:   Mon Jul 1 05:03:47 2013 -0700

ARM: Define custom ELF headers for ARM.

At least when building with the gnu toolchain, the headers the linker
    automatically generate save space for the actual ELF headers in one of the
    loadable segments. This creates two problems. First, the data you intended to
    be at the start of the image doesn't actually show up there, it's actually the
    ELF headers. Second, the ELF headers are essentially useless for firmware
    since there's currently nothing to tell you where they are, and even if there
    was, there isn't much of a reason to look at them. They're useful in userspace
    for, for instance, the dynamic linker, but not really in firmware.

This change adds a PHDRS construct to each of the linker scripts used on ARM
    which define a single segment called to_load which does not have the flag set
    which would tell the linker to put headers in it. The first section defined in
    the script has ": to_load" to tell the linker which segment to put it in, and
    from that point on the other sections go in there by default.

Change-Id: I24b721eb436d17afd234002ae82f9166d2fcf65d
    Signed-off-by: Gabe Black 
---
 src/arch/armv7/bootblock.lds   | 7 ++++++-
 src/arch/armv7/coreboot_ram.ld | 7 ++++++-
 src/arch/armv7/romstage.ld     | 7 ++++++-
 3 files changed, 18 insertions(+), 3 deletions(-)

diff --git a/src/arch/armv7/bootblock.lds b/src/arch/armv7/bootblock.lds
index 8370396..f16e72b 100644
--- a/src/arch/armv7/bootblock.lds
+++ b/src/arch/armv7/bootblock.lds
@@ -22,6 +22,11 @@
 OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
 OUTPUT_ARCH(arm)

+PHDRS
+{
+	to_load PT_LOAD;
+}
+
 TARGET(binary)
 SECTIONS
 {
@@ -39,7 +44,7 @@ SECTIONS
    	*(.rom.data.*);
    	*(.rodata.*);
    	_erom = .;
-	} = 0xff
+	} : to_load = 0xff

/DISCARD/ : {
    	*(.comment)
diff --git a/src/arch/armv7/coreboot_ram.ld b/src/arch/armv7/coreboot_ram.ld
index 487f610..38eaca3 100644
--- a/src/arch/armv7/coreboot_ram.ld
+++ b/src/arch/armv7/coreboot_ram.ld
@@ -24,6 +24,11 @@ INCLUDE ldoptions

ENTRY(stage_entry)

+PHDRS
+{
+	to_load PT_LOAD;
+}
+
 SECTIONS
 {
    . = CONFIG_SYS_SDRAM_BASE;
@@ -38,7 +43,7 @@ SECTIONS
    	*(.text.*);
    	. = ALIGN(16);
    	_etext = .;
-	}
+	} : to_load

.ctors : {
    	. = ALIGN(0x100);
diff --git a/src/arch/armv7/romstage.ld b/src/arch/armv7/romstage.ld
index 568ac1a..0555fc4 100644
--- a/src/arch/armv7/romstage.ld
+++ b/src/arch/armv7/romstage.ld
@@ -30,6 +30,11 @@ OUTPUT_ARCH(arm)

ENTRY(stage_entry)

+PHDRS
+{
+	to_load PT_LOAD;
+}
+
 SECTIONS
 {
    /* TODO make this a configurable option (per chipset). */
@@ -41,7 +46,7 @@ SECTIONS
    	*(.text.stage_entry.armv7);
    	*(.text.startup);
    	*(.text);
-	}
+	} : to_load

.romdata . : {
    	*(.rodata);