[coreboot-gerrit] [S] Change in coreboot[main]: block/fast_spi: Use read32p/write32p for SPI RW

[Subrata Banik (Code Review)]

Attention is currently required from: Arthur Heymans, Ashish Kumar Mishra, Patrick Rudolph, Paul Menzel, Saurabh Mishra.

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/82079?usp=email )

Change subject: block/fast_spi: Use read32p/write32p for SPI RW
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Patch Set 5:

(1 comment)

Commit Message:

https://review.coreboot.org/c/coreboot/+/82079/comment/5c64ff57_11444f28 :
PS5, Line 14: TEST=Build and boot mtl 64-bit and verified MRC cache working.
> Sure. This I have tested with RPL(brox/skolas) and future 64 bit platforms as well.

please state the same in the commit msg section to capture for future reference.