[coreboot-gerrit] Change in coreboot[master]: src/soc/intel/tigerlake: Fix incorrect use of Field objects in ASL

[Rizwan Qureshi (Code Review)]

Rizwan Qureshi has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39498 )

Change subject: src/soc/intel/tigerlake: Fix incorrect use of Field objects in ASL
......................................................................

src/soc/intel/tigerlake: Fix incorrect use of Field objects in ASL

In method RAOW is assumin that the first argument is a Field object
and writing to it expecting the register to get updated. However,
the callers are passing in the value of the Field object instead.

This eventually is resulting the IMGCLK not getting enable/disabled on the
platform.

Fix this by sendign the exact address of the register to be updated.

BUG=None
BRANCH=None
TEST=Build and Boot waddledoo board and verified that IMGCLKOUT for
world facing camera is enabled/disabled and able to capture images.

Signed-off-by: Rizwan Qureshi 
Change-Id: I8b886255d5f38819502ae1f4af0851b5a0922b22
---
M src/soc/intel/tigerlake/acpi/camera_clock_ctl.asl
1 file changed, 15 insertions(+), 70 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/39498/1

diff --git a/src/soc/intel/tigerlake/acpi/camera_clock_ctl.asl b/src/soc/intel/tigerlake/acpi/camera_clock_ctl.asl
index ab1097e..d9d6e0b 100644
--- a/src/soc/intel/tigerlake/acpi/camera_clock_ctl.asl
+++ b/src/soc/intel/tigerlake/acpi/camera_clock_ctl.asl
@@ -17,23 +17,15 @@
 #define R_ICLK_PCR_CAMERA1	0x8000
 #define B_ICLK_PCR_FREQUENCY	0x1
 #define B_ICLK_PCR_REQUEST	0x2
+#define B_ICLK_PCR_OFFSET	0xC

Scope (_SB.PCI0) {
-	/* IsCLK PCH register for clock settings */
-	OperationRegion (ICLK, SystemMemory, PCRB (PID_ISCLK) + R_ICLK_PCR_CAMERA1, 0x40)
-	Field (ICLK, AnyAcc, Lock, Preserve)
+	Name (ICKB, 0)
+	Store (PCRB (PID_ISCLK) + R_ICLK_PCR_CAMERA1, ICKB)
+
+	Method (OFST, 0x1, NotSerialized)
    {
-		CLK1, 8,
-		Offset(0x0C),
-		CLK2, 8,
-		Offset(0x18),
-		CLK3, 8,
-		Offset(0x24),
-		CLK4, 8,
-		Offset(0x30),
-		CLK5, 8,
-		Offset(0x3C),
-		CLK6, 8,
+		Return (ICKB + (Arg0 * B_ICLK_PCR_OFFSET))
    }

/*
@@ -44,8 +36,13 @@
     */
    Method (RAOW, 0x3, NotSerialized)
    {
-		Local0 = Arg0
-		Arg0 = Local0 & Arg1 | Arg2
+		OperationRegion (ICLK, SystemMemory, Arg0, 4)
+		Field (ICLK, AnyAcc, NoLock, Preserve)
+		{
+			VAL0, 32
+		}
+		Local0 = VAL0
+		VAL0 = Local0 & Arg1 | Arg2
    }

/*
@@ -56,33 +53,7 @@
    Method(CLKC, 0x2, NotSerialized)
    {

-		Switch (ToInteger (Arg0))
-		{
-			Case (0)
-			{
-				RAOW (CLK1, ~B_ICLK_PCR_REQUEST, Arg1 << 1)
-			}
-			Case (1)
-			{
-				RAOW (CLK2, ~B_ICLK_PCR_REQUEST, Arg1 << 1)
-			}
-			Case (2)
-			{
-				RAOW (CLK3, ~B_ICLK_PCR_REQUEST, Arg1 << 1)
-			}
-			Case (3)
-			{
-				RAOW (CLK4, ~B_ICLK_PCR_REQUEST, Arg1 << 1)
-			}
-			Case (4)
-			{
-				RAOW (CLK5, ~B_ICLK_PCR_REQUEST, Arg1 << 1)
-			}
-			Case (5)
-			{
-				RAOW (CLK6, ~B_ICLK_PCR_REQUEST, Arg1 << 1)
-			}
-		}
+		RAOW (OFST(Arg0), ~B_ICLK_PCR_REQUEST, Arg1 << 1)
    }

/*
@@ -92,33 +63,7 @@
     */
    Method (CLKF, 0x2, NotSerialized)
    {
-		Switch (ToInteger (Arg0))
-		{
-			Case (0)
-			{
-				RAOW (CLK1, ~B_ICLK_PCR_FREQUENCY, Arg1)
-			}
-			Case (1)
-			{
-				RAOW (CLK2, ~B_ICLK_PCR_FREQUENCY, Arg1)
-			}
-			Case (2)
-			{
-				RAOW (CLK3, ~B_ICLK_PCR_FREQUENCY, Arg1)
-			}
-			Case (3)
-			{
-				RAOW (CLK4, ~B_ICLK_PCR_FREQUENCY, Arg1)
-			}
-			Case (4)
-			{
-				RAOW (CLK5, ~B_ICLK_PCR_FREQUENCY, Arg1)
-			}
-			Case (5)
-			{
-				RAOW (CLK6, ~B_ICLK_PCR_FREQUENCY, Arg1)
-			}
-		}
+		RAOW (OFST(Arg0), ~B_ICLK_PCR_FREQUENCY, Arg1)
    }

/*