HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44172 )
Change subject: src: Use space after switch, while ......................................................................
src: Use space after switch, while
Change-Id: I150591aa3624895c4c321101a251547dd23d1db5 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/mainboard/lenovo/t400/dock.c M src/mainboard/lenovo/t60/dock.c M src/mainboard/lenovo/t60/early_init.c M src/mainboard/lenovo/x60/dock.c M src/northbridge/intel/x4x/dq_dqs.c 5 files changed, 10 insertions(+), 10 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/72/44172/1
diff --git a/src/mainboard/lenovo/t400/dock.c b/src/mainboard/lenovo/t400/dock.c index 5414f8b..b8163e71 100644 --- a/src/mainboard/lenovo/t400/dock.c +++ b/src/mainboard/lenovo/t400/dock.c @@ -23,7 +23,7 @@ { /* Enable 14.318MHz CLK on CLKIN */ pnp_write_config(dev, 0x29, 0xa0); - while(!(pnp_read_config(dev, 0x29) & 0x10) && timeout--) + while (!(pnp_read_config(dev, 0x29) & 0x10) && timeout--) udelay(1000); if (!timeout) return 1; diff --git a/src/mainboard/lenovo/t60/dock.c b/src/mainboard/lenovo/t60/dock.c index 378d673..55be038 100644 --- a/src/mainboard/lenovo/t60/dock.c +++ b/src/mainboard/lenovo/t60/dock.c @@ -75,7 +75,7 @@
/* Enable 14.318MHz CLK on CLKIN */ dlpc_write_register(0x29, 0xa0); - while(!(dlpc_read_register(0x29) & 0x10) && timeout--) + while (!(dlpc_read_register(0x29) & 0x10) && timeout--) udelay(1000);
if (!timeout) @@ -102,7 +102,7 @@ /* startup 14.318MHz Clock */ dock_write_register(0x29, 0xa0); /* wait until clock is settled */ - while(!(dock_read_register(0x29) & 0x10) && timeout--) + while (!(dock_read_register(0x29) & 0x10) && timeout--) udelay(1000);
if (!timeout) @@ -171,7 +171,7 @@
timeout = 1000;
- while(!(inb(DLPC_CONTROL) & 8) && timeout--) + while (!(inb(DLPC_CONTROL) & 8) && timeout--) udelay(1000);
if (!timeout) { diff --git a/src/mainboard/lenovo/t60/early_init.c b/src/mainboard/lenovo/t60/early_init.c index ad2c58e..0a1ae53 100644 --- a/src/mainboard/lenovo/t60/early_init.c +++ b/src/mainboard/lenovo/t60/early_init.c @@ -25,7 +25,7 @@
pnp_write_config(dev, 0x29, 0xa0);
- while(!(pnp_read_config(dev, 0x29) & 0x10) && timeout--) + while (!(pnp_read_config(dev, 0x29) & 0x10) && timeout--) udelay(1000);
/* Enable COM1 */ diff --git a/src/mainboard/lenovo/x60/dock.c b/src/mainboard/lenovo/x60/dock.c index 25c1aac..3abe5c1 100644 --- a/src/mainboard/lenovo/x60/dock.c +++ b/src/mainboard/lenovo/x60/dock.c @@ -72,7 +72,7 @@
/* Enable 14.318MHz CLK on CLKIN */ dlpc_write_register(0x29, 0xa0); - while(!(dlpc_read_register(0x29) & 0x10) && timeout--) + while (!(dlpc_read_register(0x29) & 0x10) && timeout--) udelay(1000);
if (!timeout) @@ -99,7 +99,7 @@
timeout = 1000;
- while(!(inb(0x164c) & 8) && timeout--) + while (!(inb(0x164c) & 8) && timeout--) udelay(1000);
if (!timeout) { @@ -121,7 +121,7 @@ dock_write_register(0x29, 0x06); /* wait until clock is settled */ timeout = 1000; - while(!(dock_read_register(0x29) & 0x08) && timeout--) + while (!(dock_read_register(0x29) & 0x08) && timeout--) udelay(1000);
if (!timeout) diff --git a/src/northbridge/intel/x4x/dq_dqs.c b/src/northbridge/intel/x4x/dq_dqs.c index dda4174..52166ed 100644 --- a/src/northbridge/intel/x4x/dq_dqs.c +++ b/src/northbridge/intel/x4x/dq_dqs.c @@ -220,7 +220,7 @@ expected_result == FAILING ? "failing" : "succeeding", channel); memset(pass_count, 0, sizeof(pass_count));
- while(succes_mask) { + while (succes_mask) { test_result = test_dq_aligned(s, channel); FOR_EACH_BYTELANE(lane) { if (((test_result >> lane) & 1) != expected_result) { @@ -390,7 +390,7 @@ FOR_EACH_BYTELANE(lane) rt_set_dqs(channel, lane, 0, &dqs_setting[lane]);
- while(status == CB_SUCCESS) { + while (status == CB_SUCCESS) { test_result = test_dqs_aligned(s, channel); if (test_result == (expected_result == SUCCEEDING ? 0 : 0xff)) return CB_SUCCESS;