Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35993 )
Change subject: cpu/x86: Add a prog_run hook to set up caching of XIP stages
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Patch Set 10:
(1 comment)
https://review.coreboot.org/c/coreboot/+/35993/5//COMMIT_MSG
Commit Message:
https://review.coreboot.org/c/coreboot/+/35993/5//COMMIT_MSG@16
PS5, Line 16: fine on at least model_1067x and model_6ex.
I'm not an expert, but would feel safer with CD set. Unless there is […]
To be clear, I meant having CD set during the MTRR write. So, clearing it
again afterwards. It just seemed odd to me to change caching while caching
is enabled, but my knowledge is really humble when it comes to caching...
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