[coreboot-gerrit] [S] Change in coreboot[master]: soc/intel/cmn/pcie: Allow SoC to overwrite snoop/no-snoop latency

[Paul Menzel (Code Review)]

Attention is currently required from: Bora Guvendik, Hannah Williams, Jérémy Compostella.

Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74141 )

Change subject: soc/intel/cmn/pcie: Allow SoC to overwrite snoop/no-snoop latency
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Patch Set 5:

(2 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/74141/comment/4357eeb8_ae2f7976 
PS4, Line 10: tolerance, let it overwrite the common code settings.
> by implementing weak the function

Why did you chose this way?

File src/soc/intel/common/block/pcie/pcie.c:

https://review.coreboot.org/c/coreboot/+/74141/comment/1cf817d3_c563059e 
PS4, Line 14: __weak
> What is coreboot recommendation or guideline in this case? […]

I could not find a document, but there are discussions on Gerrit. I couldn’t find it with the Gerrit search though.