Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43958 )
Change subject: soc/mediatek/mt8192: Add PLL and clock init support
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Patch Set 6: Code-Review+2
(1 comment)
https://review.coreboot.org/c/coreboot/+/43958/4/src/soc/mediatek/mt8192/pll...
File src/soc/mediatek/mt8192/pll.c:
https://review.coreboot.org/c/coreboot/+/43958/4/src/soc/mediatek/mt8192/pll...
PS4, Line 457: setbits32(&mtk_topckgen->clk_scp_cfg_0 , 0x3ff);
please fix this
Ack
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