EricR Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48340 )
Change subject: soc/intel/alderlake: Revise PCIE port config
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Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/48340/2/src/soc/intel/alderlake/rom...
File src/soc/intel/alderlake/romstage/fsp_params.c:
https://review.coreboot.org/c/coreboot/+/48340/2/src/soc/intel/alderlake/rom...
PS2, Line 48: config->PcieClkSrcUsage[PcieRp[i].clksrc] = i;
This may not use for it root port. Need to redefine it.. hmmm..
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