Martin Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/38024 )
Change subject: mb/google/kahlee/treeya: tune eDP delay time to 20 ms ......................................................................
mb/google/kahlee/treeya: tune eDP delay time to 20 ms
tune eDP delay time to 20 ms ensure satisfy panel spec
BUG=b:147270512 TEST=verify panel sequences by ODM.
Signed-off-by: Peichao Wang peichao.wang@bitland.corp-partner.google.com Change-Id: Ia38fbcb976de55baae480d33c6000c91dc9de6bb Reviewed-on: https://review.coreboot.org/c/coreboot/+/38024 Reviewed-by: Martin Roth martinroth@google.com Reviewed-by: chris wang Chris.Wang@amd.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/google/kahlee/variants/treeya/devicetree.cb 1 file changed, 2 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Martin Roth: Looks good to me, approved chris wang: Looks good to me, but someone else must approve
diff --git a/src/mainboard/google/kahlee/variants/treeya/devicetree.cb b/src/mainboard/google/kahlee/variants/treeya/devicetree.cb index e35f00c..019dcf6 100644 --- a/src/mainboard/google/kahlee/variants/treeya/devicetree.cb +++ b/src/mainboard/google/kahlee/variants/treeya/devicetree.cb @@ -23,6 +23,8 @@ register "stapm_percent" = "68" register "stapm_time_ms" = "900000" register "stapm_power_mw" = "7800" + register "lvds_poseq_varybl_to_blon" = "0x5" + register "lvds_poseq_blon_to_varybl" = "0x5"
# Enable I2C0 for audio, USB3 hub at 400kHz register "i2c[0]" = "{