Sricharan Ramabadhran has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30902 )
Change subject: mistral: qcs405: Updated the layout info as in Gale ......................................................................
Patch Set 11:
(2 comments)
https://review.coreboot.org/#/c/30902/5/src/mainboard/google/mistral/chromeo... File src/mainboard/google/mistral/chromeos.fmd:
https://review.coreboot.org/#/c/30902/5/src/mainboard/google/mistral/chromeo... PS5, Line 7: GBB@0x301000 0xdef00
we should be able to make this smaller. […]
Ok. So this we copied the layout same as in Gale, as per the feedback on buganiser. So if we want to make GBB smaller, should additional space be added to VPD (or) keep it reserved for now outside ?
https://review.coreboot.org/#/c/30902/5/src/mainboard/google/mistral/chromeo... PS5, Line 20: RW_GPT@0x560000 0x20000 {
The GPT is necessary so the boot ROM can boot from SPI? How does the boot ROM find the GPTs, fixed o […]
In fact, we took this layout from Gale chromeos.fmd after we are asked to start using that. The GPT required to boot from spi-nor goes in to the bootblock at 0x0 offset and that's already in RO section above. Little unsure, why Gale had this GPT over here. So would it be fine to remove this altogether ?