Attention is currently required from: Nico Huber, Arthur Heymans.
Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74441 )
Change subject: cpu/intel/speedstep: Use acpigen_write_processor_device() ......................................................................
Patch Set 4:
(2 comments)
File src/southbridge/intel/i82801gx/fadt.c:
https://review.coreboot.org/c/coreboot/+/74441/comment/67e09efe_04835e1b PS4, Line 29: fadt->p_lvl3_lat = chip->c3_latency;
This leaves the `c3_latency` field blind. Would it be much hassle to port […]
Well, the question is if _CST is a property of the installed CPU part and the location of get_cst_entries() implementations under mb/ is wrong to begin with.
File src/southbridge/intel/i82801jx/fadt.c:
https://review.coreboot.org/c/coreboot/+/74441/comment/5025336c_ba6e8df2 PS4, Line 25: fadt->p_lvl3_lat = 0; /* FIXME: Is this correct? */
ACPI spec: "A value > 1000 indicates the system does not support a C3 state.". […]
Commit message hopefully raises enough eyebrows for someone to act on a fix without degraded performance / battery life.