Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48488 )
Change subject: soc/amd/cezanne: add 0xcf9 reset ......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/c/coreboot/+/48488/3/src/soc/amd/cezanne/reset.c File src/soc/amd/cezanne/reset.c:
https://review.coreboot.org/c/coreboot/+/48488/3/src/soc/amd/cezanne/reset.c... PS3, Line 49: void chipset_handle_reset(uint32_t status)
https://review.coreboot.org/c/coreboot/+/48488/3/src/soc/amd/cezanne/include.... […]
Done in CB:48537