[coreboot-gerrit] Change in ...coreboot[master]: mediatek/mt8183: modify vdram1 voltage

[hsin-hsiung wang (Code Review)]

hsin-hsiung wang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33186

Change subject: mediatek/mt8183: modify vdram1 voltage
......................................................................

mediatek/mt8183: modify vdram1 voltage

Dram DVFS needs calibration with different vdram1 voltage to get correct
parameters, so we provide a api to change vdram1 voltage.

BUG=b:80501386
BRANCH=none
TEST=measure vdram1 voltage with multimeter

Change-Id: Ia15ab3a2e1668e5b4873d317b57a38ebee037709
Signed-off-by: Hsin-Hsiung Wang 
---
M src/soc/mediatek/mt8183/include/soc/mt6358.h
M src/soc/mediatek/mt8183/mt6358.c
2 files changed, 28 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/33186/1

diff --git a/src/soc/mediatek/mt8183/include/soc/mt6358.h b/src/soc/mediatek/mt8183/include/soc/mt6358.h
index 02937ba..c90e6e4 100644
--- a/src/soc/mediatek/mt8183/include/soc/mt6358.h
+++ b/src/soc/mediatek/mt8183/include/soc/mt6358.h
@@ -26,6 +26,9 @@
    PMIC_PWRHOLD                  = 0x0a08,
    PMIC_CPSDSA4                  = 0x0a2e,
    PMIC_VDRAM1_VOSEL_SLEEP       = 0x160a,
+	PMIC_VDRAM1_OP_EN             = 0x1610,
+	PMIC_VDRAM1_DBG0              = 0x161e,
+	PMIC_VDRAM1_VOSEL             = 0x1626,
    PMIC_SMPS_ANA_CON0            = 0x1808,
 };

@@ -38,5 +41,7 @@

void mt6358_init(void);
 void pmic_set_power_hold(bool enable);
+unsigned int pmic_get_vdram1_vol(void);
+void pmic_set_vdram1_vol(unsigned int vdram_uv);

#endif /* __SOC_MEDIATEK_MT6358_H__ */
diff --git a/src/soc/mediatek/mt8183/mt6358.c b/src/soc/mediatek/mt8183/mt6358.c
index 7054243..ea4e7bd 100644
--- a/src/soc/mediatek/mt8183/mt6358.c
+++ b/src/soc/mediatek/mt8183/mt6358.c
@@ -733,6 +733,29 @@
    pwrap_write_field(PMIC_PWRHOLD, (enable) ? 1 : 0, 0x1, 0);
 }

+unsigned int pmic_get_vdram1_vol(void)
+{
+	unsigned int vol_reg;
+
+	vol_reg = pwrap_read_field(PMIC_VDRAM1_DBG0, 0x7F, 0);
+	return (500000 + vol_reg * 12500);
+}
+
+void pmic_set_vdram1_vol(unsigned int vdram_uv)
+{
+	unsigned int vol_reg;
+
+	if (500000 > vdram_uv)
+		vol_reg = 0;
+	else if (vdram_uv > 1300000)
+		vol_reg = 0x40;
+	else
+		vol_reg = (vdram_uv - 500000) / 12500;
+
+	pwrap_write_field(PMIC_VDRAM1_OP_EN, 1, 0x7F, 0);
+	pwrap_write_field(PMIC_VDRAM1_VOSEL, vol_reg, 0x7F, 0);
+}
+
 static void pmic_wdt_set(void)
 {
    /* [5]=1, RG_WDTRSTB_DEB */