[coreboot-gerrit] [S] Change in coreboot[main]: nb/intel/sandybridge: assign host bridge ops in chipset devicetree

[Felix Held (Code Review)]

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/79113?usp=email )

(

1 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
 )Change subject: nb/intel/sandybridge: assign host bridge ops in chipset devicetree
......................................................................

nb/intel/sandybridge: assign host bridge ops in chipset devicetree

Since the host bridge is always function 0 of device 0 on bus 0, the
device operations can be statically assigned in the devicetree and
there's no need to bind the host bridge device operations to the PCI
device during runtime via a list of PCI IDs.

TEST=Lenovo X220 still boots to Linux

Signed-off-by: Felix Held 
Tested-by: Patrick Rudolph 
Change-Id: Icf3d9f8cd2be2f8ef71fd9fdb5f005f3b683332e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79113
Reviewed-by: Arthur Heymans 
Tested-by: build bot (Jenkins) 
Reviewed-by: Patrick Rudolph 
---
M src/northbridge/intel/sandybridge/chipset.cb
M src/northbridge/intel/sandybridge/northbridge.c
2 files changed, 2 insertions(+), 14 deletions(-)

Approvals:
  Patrick Rudolph: Looks good to me, approved
  Arthur Heymans: Looks good to me, approved
  build bot (Jenkins): Verified

diff --git a/src/northbridge/intel/sandybridge/chipset.cb b/src/northbridge/intel/sandybridge/chipset.cb
index 5635ca6..9fb1701 100644
--- a/src/northbridge/intel/sandybridge/chipset.cb
+++ b/src/northbridge/intel/sandybridge/chipset.cb
@@ -10,7 +10,7 @@
    end
    device domain 0 on
    	ops sandybridge_pci_domain_ops
-		device pci 00.0 alias host_bridge on end # host bridge
+		device pci 00.0 alias host_bridge on ops sandybridge_host_bridge_ops end
    	device pci 01.0 alias peg10 off end # PEG10
    	device pci 01.1 alias peg11 off end # PEG11
    	device pci 01.2 alias peg12 off end # PEG12
diff --git a/src/northbridge/intel/sandybridge/northbridge.c b/src/northbridge/intel/sandybridge/northbridge.c
index 9511cc3..6b89710 100644
--- a/src/northbridge/intel/sandybridge/northbridge.c
+++ b/src/northbridge/intel/sandybridge/northbridge.c
@@ -390,7 +390,7 @@
    set_above_4g_pci(dev);
 }

-static struct device_operations mc_ops = {
+struct device_operations sandybridge_host_bridge_ops = {
    .read_resources         = mc_read_resources,
    .set_resources          = pci_dev_set_resources,
    .enable_resources       = pci_dev_enable_resources,
@@ -399,18 +399,6 @@
    .acpi_fill_ssdt		= mc_gen_ssdt,
 };

-static const unsigned short pci_device_ids[] = {
-	0x0100, 0x0104, 0x0108,		/* Sandy Bridge */
-	0x0150, 0x0154, 0x0158,		/* Ivy Bridge */
-	0
-};
-
-static const struct pci_driver mc_driver __pci_driver = {
-	.ops     = &mc_ops,
-	.vendor  = PCI_VID_INTEL,
-	.devices = pci_device_ids,
-};
-
 struct device_operations sandybridge_cpu_bus_ops = {
    .read_resources   = noop_read_resources,
    .set_resources    = noop_set_resources,