[coreboot-gerrit] Change in coreboot[master]: soc/intel/jasperlake: Set xHCI LFPS period sampling off time

[Karthik Ramasubramanian (Code Review)]

Attention is currently required from: Furquan Shaikh, Ben Kao, Patrick Rudolph.
Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56063 )

Change subject: soc/intel/jasperlake: Set xHCI LFPS period sampling off time
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Patch Set 2: Code-Review+2

(1 comment)

Patchset:

PS2: 
LGTM - the default value matches with the EDS and the stage at which XHCI_PMCTRL register is configured matches with the previous Intel platforms.