Attention is currently required from: Jason Nien, Martin Roth.
Patrick Huang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/73917 )
Change subject: mb/google/skyrim: Add UPD usb3_port_force_gen1 for skyrim ......................................................................
mb/google/skyrim: Add UPD usb3_port_force_gen1 for skyrim
Add UPD usb3_port_force_gen1 for skyrim The default setting is set to disable Skyrim -> set default as disable
BUG=b:273841155 BRANCH=skyrim TEST=Build, verify the setting will be applied on skyrim.
Change-Id: Id53bed82a9fef93b574c3f30830555e02d7f4737 Signed-off-by: Patrick Huang patrick.huang@amd.corp-partner.google.com --- M src/mainboard/google/skyrim/variants/skyrim/overridetree.cb 1 file changed, 25 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/73917/1
diff --git a/src/mainboard/google/skyrim/variants/skyrim/overridetree.cb b/src/mainboard/google/skyrim/variants/skyrim/overridetree.cb index 512104d..eb16120 100644 --- a/src/mainboard/google/skyrim/variants/skyrim/overridetree.cb +++ b/src/mainboard/google/skyrim/variants/skyrim/overridetree.cb @@ -32,6 +32,13 @@ # Remove the sustained_power_limit_mW when STT is enabled register "sustained_power_limit_mW" = "15000"
+ # set usb3 port force to gen1 + register "usb3_port_force_gen1" = "{ + .ports.xhci0_port0 = 0, + .ports.xhci1_port0 = 0, + .ports.xhci1_port1 = 0, + }" + device domain 0 on device ref gpp_bridge_a on # Internal GPP Bridge 0 to Bus A device ref xhci_1 on # XHCI1 controller