Hello Jes Klinke, build bot (Jenkins), Patrick Georgi, Furquan Shaikh, Martin Roth, Jes Klinke, Aaron Durbin,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/47114
to review the following change.
Change subject: Revert "mb/google/volteer: New variant for Volteer reworked with Dauntless" ......................................................................
Revert "mb/google/volteer: New variant for Volteer reworked with Dauntless"
This reverts commit fbb568347de2037e64e894e2ec68c61ff3de73c8.
Reason for revert: Causes a build failure.
Change-Id: I461b3b954b006afac70ce73b33daeb957fbe1002 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/mainboard/google/volteer/Kconfig M src/mainboard/google/volteer/Kconfig.name M src/mainboard/google/volteer/variants/volteer2/gpio.c M src/mainboard/google/volteer/variants/volteer2/overridetree.cb 4 files changed, 1 insertion(+), 52 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/47114/1
diff --git a/src/mainboard/google/volteer/Kconfig b/src/mainboard/google/volteer/Kconfig index 23dbf68..8fd119e 100644 --- a/src/mainboard/google/volteer/Kconfig +++ b/src/mainboard/google/volteer/Kconfig @@ -24,8 +24,7 @@ select HAVE_ACPI_TABLES select INTEL_LPSS_UART_FOR_CONSOLE select MAINBOARD_HAS_CHROMEOS - select MAINBOARD_HAS_SPI_TPM_CR50 if !BOARD_GOOGLE_VOLTEER2_TI50 - select MAINBOARD_HAS_I2C_TPM_CR50 if BOARD_GOOGLE_VOLTEER2_TI50 + select MAINBOARD_HAS_SPI_TPM_CR50 select MAINBOARD_HAS_TPM2 select PCIEXP_HOTPLUG select SOC_INTEL_TIGERLAKE @@ -72,14 +71,6 @@ config DRIVER_TPM_SPI_BUS default 0x1
-config DRIVER_TPM_I2C_BUS - hex - default 0x1 - -config DRIVER_TPM_I2C_ADDR - hex - default 0x50 - config MAINBOARD_DIR string default "google/volteer" @@ -100,7 +91,6 @@ default "Trondo" if BOARD_GOOGLE_TRONDO default "Volteer" if BOARD_GOOGLE_VOLTEER default "Volteer2" if BOARD_GOOGLE_VOLTEER2 - default "Volteer2_Ti50" if BOARD_GOOGLE_VOLTEER2_TI50 default "Voxel" if BOARD_GOOGLE_VOXEL default "Boldar" if BOARD_GOOGLE_BOLDAR default "Elemi" if BOARD_GOOGLE_ELEMI @@ -140,7 +130,6 @@ default "trondo" if BOARD_GOOGLE_TRONDO default "volteer" if BOARD_GOOGLE_VOLTEER default "volteer2" if BOARD_GOOGLE_VOLTEER2 - default "volteer2" if BOARD_GOOGLE_VOLTEER2_TI50 default "voxel" if BOARD_GOOGLE_VOXEL default "boldar" if BOARD_GOOGLE_BOLDAR default "elemi" if BOARD_GOOGLE_ELEMI diff --git a/src/mainboard/google/volteer/Kconfig.name b/src/mainboard/google/volteer/Kconfig.name index d8f1b44..9e48a2f 100644 --- a/src/mainboard/google/volteer/Kconfig.name +++ b/src/mainboard/google/volteer/Kconfig.name @@ -58,15 +58,6 @@ select USE_CAR_NEM_ENHANCED_V2 select DRIVERS_GENESYSLOGIC_GL9755
-# Reworked Volteer2 prototype, Haven chip replaced with Dauntless demo board -config BOARD_GOOGLE_VOLTEER2_TI50 - bool "-> Volteer2_Ti50" - select BOARD_GOOGLE_BASEBOARD_VOLTEER - select VARIANT_HAS_MIPI_CAMERA - select SOC_INTEL_CSE_LITE_SKU - select USE_CAR_NEM_ENHANCED_V2 - select DRIVERS_GENESYSLOGIC_GL9755 - config BOARD_GOOGLE_VOXEL bool "-> Voxel" select BOARD_GOOGLE_BASEBOARD_VOLTEER diff --git a/src/mainboard/google/volteer/variants/volteer2/gpio.c b/src/mainboard/google/volteer/variants/volteer2/gpio.c index 069b2f0..6c67fc2 100644 --- a/src/mainboard/google/volteer/variants/volteer2/gpio.c +++ b/src/mainboard/google/volteer/variants/volteer2/gpio.c @@ -243,11 +243,6 @@
/* H11 : SRCCLKREQ5# ==> WLAN_PERST_L */ PAD_CFG_GPO(GPP_H11, 1, DEEP), - - /* The two signals used for I2C communication with Ti50 on the - * volteer2_ti50 variant. */ - PAD_CFG_NF(GPP_C18, NONE, DEEP, NF1), /* PCH_I2C1_TOUCH_USI_SDA */ - PAD_CFG_NF(GPP_C19, NONE, DEEP, NF1), /* PCH_I2C1_TOUCH_USI_SCL */ };
const struct pad_config *variant_override_gpio_table(size_t *num) diff --git a/src/mainboard/google/volteer/variants/volteer2/overridetree.cb b/src/mainboard/google/volteer/variants/volteer2/overridetree.cb index 502883e..a36a844 100644 --- a/src/mainboard/google/volteer/variants/volteer2/overridetree.cb +++ b/src/mainboard/google/volteer/variants/volteer2/overridetree.cb @@ -56,32 +56,6 @@ register "FastPkgCRampDisable[VR_DOMAIN_SA]" = "1" register "FastPkgCRampDisable[VR_DOMAIN_VLCC]" = "1"
- # Depending on whether we use I2C bus 1 or SPI bus 0 for TPM - # communication, that one needs early initialization. - register "common_soc_config" = "{ - .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT, - .gspi[0] = { - .speed_mhz = 1, - .early_init = CONFIG(MAINBOARD_HAS_SPI_TPM_CR50), - }, - .i2c[0] = { - .speed = I2C_SPEED_FAST, - }, - .i2c[1] = { - .speed = I2C_SPEED_FAST, - .early_init = CONFIG(MAINBOARD_HAS_I2C_TPM_CR50), - }, - .i2c[2] = { - .speed = I2C_SPEED_FAST, - }, - .i2c[3] = { - .speed = I2C_SPEED_FAST, - }, - .i2c[5] = { - .speed = I2C_SPEED_FAST, - }, - }" - device domain 0 on device ref dptf on chip drivers/intel/dptf