Matt DeVillier has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47187 )
Change subject: mb/purism/librem_mini: drop unused HeciEnabled register ......................................................................
mb/purism/librem_mini: drop unused HeciEnabled register
this should have been corrected as part of: 3de90d1 [soc/intel/cnl: Set Heci1Disable depending on devicetree config]
Change-Id: I6a103a1de01fc258ef359258a8a64f4c5a181139 Signed-off-by: Matt DeVillier matt.devillier@puri.sm --- M src/mainboard/purism/librem_cnl/variants/librem_mini/devicetree.cb 1 file changed, 1 insertion(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/47187/1
diff --git a/src/mainboard/purism/librem_cnl/variants/librem_mini/devicetree.cb b/src/mainboard/purism/librem_cnl/variants/librem_mini/devicetree.cb index 9d2b34b..ae19b04 100644 --- a/src/mainboard/purism/librem_cnl/variants/librem_mini/devicetree.cb +++ b/src/mainboard/purism/librem_cnl/variants/librem_mini/devicetree.cb @@ -204,10 +204,7 @@ device pci 15.1 off end # I2C #1 device pci 15.2 off end # I2C #2 device pci 15.3 off end # I2C #3 - device pci 16.0 off # Management Engine Interface 1 - # HECI must be enabled w/HAP disable else S3 issues - register "HeciEnabled" = "1" - end + device pci 16.0 off end # Management Engine Interface 1 device pci 16.1 off end # Management Engine Interface 2 device pci 16.2 off end # Management Engine IDE-R device pci 16.3 off end # Management Engine KT Redirection