Hello Patrick Rudolph, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/37874
to look at the new patch set (#2).
Change subject: soc/intel/cannonlake: Add VR config for CML ......................................................................
soc/intel/cannonlake: Add VR config for CML
Add VR config TdcPowerLimit ,IccMax, DC and AC loadline defaults Add cpu_pl2_4_cfg to switch two kinds of VR design
BUG:b:145094963 BRANCH:none TEST:build coreboot and fsp with enabled fw_debug. Flashed to device and checked the log. All VR configs were set correctly.
Change-Id: I3922bfad5c21dafc64fb05c7d9343b9835b58752 Signed-off-by: Jamie Chen jamie.chen@intel.com --- M src/soc/intel/cannonlake/chip.h M src/soc/intel/cannonlake/include/soc/vr_config.h M src/soc/intel/cannonlake/vr_config.c 3 files changed, 250 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/37874/2