Hello Patrick Rudolph, Kane Chen, Duncan Laurie, Shelley Chen, build bot (Jenkins), John Su, Furquan Shaikh, Jamie Chen, Thejaswani Putta, EricR Lai, Edward O'Callaghan, Mathew King, Tim Wawrzynczak,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/38741
to look at the new patch set (#11).
Change subject: soc/intel/cannonlake: Add tdc config for CML
......................................................................
soc/intel/cannonlake: Add tdc config for CML
Add Thermal Design Current (TDC) defaults for CML:
1. TdcEnable
2. TdcPowerLimit
BUG=b:148912093
BRANCH=None
TEST=build coreboot and check TdcEnable and TdcPowerLimit for
each domain in FSP log
Signed-off-by: Marx Wang marx.wang@intel.com
Change-Id: Ie4b17e5b4ce41c1adb436ae5646f0d8578a440e8
---
M src/soc/intel/cannonlake/include/soc/vr_config.h
M src/soc/intel/cannonlake/vr_config.c
2 files changed, 113 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/38741/11
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ie4b17e5b4ce41c1adb436ae5646f0d8578a440e8
Gerrit-Change-Number: 38741
Gerrit-PatchSet: 11
Gerrit-Owner: Marx Wang
marx.wang@intel.com
Gerrit-Reviewer: Duncan Laurie
dlaurie@chromium.org
Gerrit-Reviewer: Edward O'Callaghan
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Gerrit-Reviewer: EricR Lai
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Gerrit-Reviewer: Furquan Shaikh
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Gerrit-Reviewer: Jamie Chen
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Gerrit-Reviewer: John Su
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Gerrit-Reviewer: Kane Chen
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Gerrit-Reviewer: Marx Wang
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Gerrit-Reviewer: Mathew King
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Gerrit-Reviewer: Patrick Rudolph
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Gerrit-Reviewer: Shelley Chen
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Gerrit-Reviewer: Thejaswani Putta
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Gerrit-Reviewer: Tim Wawrzynczak
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Gerrit-MessageType: newpatchset