9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40110 )
Change subject: soc/intel/xeon_sp/cpx: add chip operation and PCIe enumeration ......................................................................
Patch Set 20:
Automatic boot test returned (PASS/FAIL/TOTAL): 4/0/4 Emulation targets: "QEMU x86 q35/ich9" using payload TianoCore : SUCCESS : https://lava.9esec.io/r/4853 "QEMU x86 q35/ich9" using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/4852 "QEMU x86 i440fx/piix4" using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/4851 "QEMU AArch64" using payload LinuxBoot_u-root_kexec : SUCCESS : https://lava.9esec.io/r/4850
Please note: This test is under development and might not be accurate at all!