build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37996 )
Change subject: soc/mediatek/mt8183: add TX tracking for DRAM DVFS ......................................................................
Patch Set 8:
(98 comments)
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... File src/soc/mediatek/mt8183/dramc_pi_calibration_api.c:
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2345: if (shu_src >= DRAM_DFS_SHUFFLE_MAX || shu_dst>= DRAM_DFS_SHUFFLE_MAX) { spaces required around that '>=' (ctx:VxW)
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2351: div_round_close((get_shu_frequency(shu_dst) >> 1)* 32, need consistent spacing around '*' (ctx:VxW)
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2380: u4value = READ32_BITFIELD(&ch[chn].ao.shu[0].rk[rnk].selph_dqsg0, SHURK0_SELPH_DQSG0_TX_DLY_DQS0_GATED); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2381: u4value1 = READ32_BITFIELD(&ch[chn].ao.shu[0].rk[rnk].selph_dqsg1, SHURK0_SELPH_DQSG1_REG_DLY_DQS0_GATED); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2382: SET32_BITFIELDS(&ch[chn].ao.rk[rnk].pre_tdqsck[0], RK0_PRE_TDQSCK1_TDQSCK_UIFREQ1_B0R0, (u4value << 3) | u4value1); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2383: u4value = READ32_BITFIELD(&ch[chn].ao.shu[0].rk[rnk].dqsien, SHURK0_DQSIEN_R0DQS0IEN); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2384: SET32_BITFIELDS(&ch[chn].ao.rk[rnk].pre_tdqsck[0], RK0_PRE_TDQSCK1_TDQSCK_PIFREQ1_B0R0, u4value); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2385: u4value = READ32_BITFIELD(&ch[chn].ao.shu[0].rk[rnk].selph_dqsg0, SHURK0_SELPH_DQSG0_TX_DLY_DQS0_GATED_P1); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2386: u4value1 = READ32_BITFIELD(&ch[chn].ao.shu[0].rk[rnk].selph_dqsg1, SHURK0_SELPH_DQSG1_REG_DLY_DQS0_GATED_P1); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2387: SET32_BITFIELDS(&ch[chn].ao.rk[rnk].pre_tdqsck[2], RK0_PRE_TDQSCK3_TDQSCK_UIFREQ1_P1_B0R0, (u4value << 3) | u4value1); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2389: u4value = READ32_BITFIELD(&ch[chn].ao.shu[1].rk[rnk].selph_dqsg0, SHURK0_SELPH_DQSG0_TX_DLY_DQS0_GATED); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2390: u4value1 = READ32_BITFIELD(&ch[chn].ao.shu[1].rk[rnk].selph_dqsg1, SHURK0_SELPH_DQSG1_REG_DLY_DQS0_GATED); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2391: SET32_BITFIELDS(&ch[chn].ao.rk[rnk].pre_tdqsck[0], RK0_PRE_TDQSCK1_TDQSCK_UIFREQ2_B0R0, (u4value << 3) | u4value1); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2392: u4value = READ32_BITFIELD(&ch[chn].ao.shu[1].rk[rnk].dqsien, SHURK0_DQSIEN_R0DQS0IEN); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2393: SET32_BITFIELDS(&ch[chn].ao.rk[rnk].pre_tdqsck[0], RK0_PRE_TDQSCK1_TDQSCK_PIFREQ2_B0R0, u4value); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2394: u4value = READ32_BITFIELD(&ch[chn].ao.shu[1].rk[rnk].selph_dqsg0, SHURK0_SELPH_DQSG0_TX_DLY_DQS0_GATED_P1); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2395: u4value1 = READ32_BITFIELD(&ch[chn].ao.shu[1].rk[rnk].selph_dqsg1, SHURK0_SELPH_DQSG1_REG_DLY_DQS0_GATED_P1); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2396: SET32_BITFIELDS(&ch[chn].ao.rk[rnk].pre_tdqsck[2], RK0_PRE_TDQSCK3_TDQSCK_UIFREQ2_P1_B0R0, (u4value << 3) | u4value1); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2398: u4value = READ32_BITFIELD(&ch[chn].ao.shu[2].rk[rnk].selph_dqsg0, SHURK0_SELPH_DQSG0_TX_DLY_DQS0_GATED); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2399: u4value1 = READ32_BITFIELD(&ch[chn].ao.shu[2].rk[rnk].selph_dqsg1, SHURK0_SELPH_DQSG1_REG_DLY_DQS0_GATED); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2400: SET32_BITFIELDS(&ch[chn].ao.rk[rnk].pre_tdqsck[1], RK0_PRE_TDQSCK2_TDQSCK_UIFREQ3_B0R0, (u4value << 3) | u4value1); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2401: u4value = READ32_BITFIELD(&ch[chn].ao.shu[2].rk[rnk].dqsien, SHURK0_DQSIEN_R0DQS0IEN); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2402: SET32_BITFIELDS(&ch[chn].ao.rk[rnk].pre_tdqsck[1], RK0_PRE_TDQSCK2_TDQSCK_PIFREQ3_B0R0, u4value); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2403: u4value = READ32_BITFIELD(&ch[chn].ao.shu[2].rk[rnk].selph_dqsg0, SHURK0_SELPH_DQSG0_TX_DLY_DQS0_GATED_P1); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2404: u4value1 = READ32_BITFIELD(&ch[chn].ao.shu[2].rk[rnk].selph_dqsg1, SHURK0_SELPH_DQSG1_REG_DLY_DQS0_GATED_P1); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2405: SET32_BITFIELDS(&ch[chn].ao.rk[rnk].pre_tdqsck[2], RK0_PRE_TDQSCK3_TDQSCK_UIFREQ3_P1_B0R0, (u4value << 3) | u4value1); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2409: u4value = READ32_BITFIELD(&ch[chn].ao.shu[0].rk[rnk].selph_dqsg0, SHURK0_SELPH_DQSG0_TX_DLY_DQS1_GATED); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2410: u4value1 = READ32_BITFIELD(&ch[chn].ao.shu[0].rk[rnk].selph_dqsg1, SHURK0_SELPH_DQSG1_REG_DLY_DQS1_GATED); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2411: SET32_BITFIELDS(&ch[chn].ao.rk[rnk].pre_tdqsck[3], RK0_PRE_TDQSCK4_TDQSCK_UIFREQ1_B1R0, (u4value << 3) | u4value1); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2412: u4value = READ32_BITFIELD(&ch[chn].ao.shu[0].rk[rnk].dqsien, SHURK0_DQSIEN_R0DQS1IEN); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2413: SET32_BITFIELDS(&ch[chn].ao.rk[rnk].pre_tdqsck[3], RK0_PRE_TDQSCK4_TDQSCK_PIFREQ1_B1R0, u4value); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2414: u4value = READ32_BITFIELD(&ch[chn].ao.shu[0].rk[rnk].selph_dqsg0, SHURK0_SELPH_DQSG0_TX_DLY_DQS1_GATED_P1); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2415: u4value1 = READ32_BITFIELD(&ch[chn].ao.shu[0].rk[rnk].selph_dqsg1, SHURK0_SELPH_DQSG1_REG_DLY_DQS1_GATED_P1); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2416: SET32_BITFIELDS(&ch[chn].ao.rk[rnk].pre_tdqsck[5], RK0_PRE_TDQSCK6_TDQSCK_UIFREQ1_P1_B1R0, (u4value << 3) | u4value1); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2418: u4value = READ32_BITFIELD(&ch[chn].ao.shu[1].rk[rnk].selph_dqsg0, SHURK0_SELPH_DQSG0_TX_DLY_DQS1_GATED); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2419: u4value1 = READ32_BITFIELD(&ch[chn].ao.shu[1].rk[rnk].selph_dqsg1, SHURK0_SELPH_DQSG1_REG_DLY_DQS1_GATED); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2420: SET32_BITFIELDS(&ch[chn].ao.rk[rnk].pre_tdqsck[3], RK0_PRE_TDQSCK4_TDQSCK_UIFREQ2_B1R0, (u4value << 3) | u4value1); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2421: u4value = READ32_BITFIELD(&ch[chn].ao.shu[1].rk[rnk].dqsien, SHURK0_DQSIEN_R0DQS1IEN); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2422: SET32_BITFIELDS(&ch[chn].ao.rk[rnk].pre_tdqsck[3], RK0_PRE_TDQSCK4_TDQSCK_PIFREQ2_B1R0, u4value); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2423: u4value = READ32_BITFIELD(&ch[chn].ao.shu[1].rk[rnk].selph_dqsg0, SHURK0_SELPH_DQSG0_TX_DLY_DQS1_GATED_P1); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2424: u4value1 = READ32_BITFIELD(&ch[chn].ao.shu[1].rk[rnk].selph_dqsg1, SHURK0_SELPH_DQSG1_REG_DLY_DQS1_GATED_P1); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2425: SET32_BITFIELDS(&ch[chn].ao.rk[rnk].pre_tdqsck[5], RK0_PRE_TDQSCK6_TDQSCK_UIFREQ2_P1_B1R0, (u4value << 3) | u4value1); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2427: u4value = READ32_BITFIELD(&ch[chn].ao.shu[2].rk[rnk].selph_dqsg0, SHURK0_SELPH_DQSG0_TX_DLY_DQS1_GATED); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2428: u4value1 = READ32_BITFIELD(&ch[chn].ao.shu[2].rk[rnk].selph_dqsg1, SHURK0_SELPH_DQSG1_REG_DLY_DQS1_GATED); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2429: SET32_BITFIELDS(&ch[chn].ao.rk[rnk].pre_tdqsck[4], RK0_PRE_TDQSCK5_TDQSCK_UIFREQ3_B1R0, (u4value << 3) | u4value1); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2430: u4value = READ32_BITFIELD(&ch[chn].ao.shu[2].rk[rnk].dqsien, SHURK0_DQSIEN_R0DQS1IEN); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2431: SET32_BITFIELDS(&ch[chn].ao.rk[rnk].pre_tdqsck[4], RK0_PRE_TDQSCK5_TDQSCK_PIFREQ3_B1R0, u4value); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2432: u4value = READ32_BITFIELD(&ch[chn].ao.shu[2].rk[rnk].selph_dqsg0, SHURK0_SELPH_DQSG0_TX_DLY_DQS1_GATED_P1); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2433: u4value1 = READ32_BITFIELD(&ch[chn].ao.shu[2].rk[rnk].selph_dqsg1, SHURK0_SELPH_DQSG1_REG_DLY_DQS1_GATED_P1); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2434: SET32_BITFIELDS(&ch[chn].ao.rk[rnk].pre_tdqsck[5], RK0_PRE_TDQSCK6_TDQSCK_UIFREQ3_P1_B1R0, (u4value << 3) | u4value1); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2438: u4value = READ32_BITFIELD(&ch[chn].ao.shu[0].rk[rnk].selph_dqsg0, SHURK0_SELPH_DQSG0_TX_DLY_DQS2_GATED); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2439: u4value1 = READ32_BITFIELD(&ch[chn].ao.shu[0].rk[rnk].selph_dqsg1, SHURK0_SELPH_DQSG1_REG_DLY_DQS2_GATED); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2440: SET32_BITFIELDS(&ch[chn].ao.rk[rnk].pre_tdqsck[6], RK0_PRE_TDQSCK7_TDQSCK_UIFREQ1_B2R0, (u4value << 3) | u4value1); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2441: u4value = READ32_BITFIELD(&ch[chn].ao.shu[0].rk[rnk].dqsien, SHURK0_DQSIEN_R0DQS2IEN); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2442: SET32_BITFIELDS(&ch[chn].ao.rk[rnk].pre_tdqsck[6], RK0_PRE_TDQSCK7_TDQSCK_PIFREQ1_B2R0, u4value); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2443: u4value = READ32_BITFIELD(&ch[chn].ao.shu[0].rk[rnk].selph_dqsg0, SHURK0_SELPH_DQSG0_TX_DLY_DQS2_GATED_P1); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2444: u4value1 = READ32_BITFIELD(&ch[chn].ao.shu[0].rk[rnk].selph_dqsg1, SHURK0_SELPH_DQSG1_REG_DLY_DQS2_GATED_P1); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2445: SET32_BITFIELDS(&ch[chn].ao.rk[rnk].pre_tdqsck[8], RK0_PRE_TDQSCK9_TDQSCK_UIFREQ1_P1_B2R0, (u4value << 3) | u4value1); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2447: u4value = READ32_BITFIELD(&ch[chn].ao.shu[1].rk[rnk].selph_dqsg0, SHURK0_SELPH_DQSG0_TX_DLY_DQS2_GATED); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2448: u4value1 = READ32_BITFIELD(&ch[chn].ao.shu[1].rk[rnk].selph_dqsg1, SHURK0_SELPH_DQSG1_REG_DLY_DQS2_GATED); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2449: SET32_BITFIELDS(&ch[chn].ao.rk[rnk].pre_tdqsck[6], RK0_PRE_TDQSCK7_TDQSCK_UIFREQ2_B2R0, (u4value << 3) | u4value1); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2450: u4value = READ32_BITFIELD(&ch[chn].ao.shu[1].rk[rnk].dqsien, SHURK0_DQSIEN_R0DQS2IEN); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2451: SET32_BITFIELDS(&ch[chn].ao.rk[rnk].pre_tdqsck[6], RK0_PRE_TDQSCK7_TDQSCK_PIFREQ2_B2R0, u4value); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2452: u4value = READ32_BITFIELD(&ch[chn].ao.shu[1].rk[rnk].selph_dqsg0, SHURK0_SELPH_DQSG0_TX_DLY_DQS2_GATED_P1); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2453: u4value1 = READ32_BITFIELD(&ch[chn].ao.shu[1].rk[rnk].selph_dqsg1, SHURK0_SELPH_DQSG1_REG_DLY_DQS2_GATED_P1); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2454: SET32_BITFIELDS(&ch[chn].ao.rk[rnk].pre_tdqsck[8], RK0_PRE_TDQSCK9_TDQSCK_UIFREQ2_P1_B2R0, (u4value << 3) | u4value1); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2456: u4value = READ32_BITFIELD(&ch[chn].ao.shu[2].rk[rnk].selph_dqsg0, SHURK0_SELPH_DQSG0_TX_DLY_DQS2_GATED); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2457: u4value1 = READ32_BITFIELD(&ch[chn].ao.shu[2].rk[rnk].selph_dqsg1, SHURK0_SELPH_DQSG1_REG_DLY_DQS2_GATED); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2458: SET32_BITFIELDS(&ch[chn].ao.rk[rnk].pre_tdqsck[7], RK0_PRE_TDQSCK8_TDQSCK_UIFREQ3_B2R0, (u4value << 3) | u4value1); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2459: u4value = READ32_BITFIELD(&ch[chn].ao.shu[2].rk[rnk].dqsien, SHURK0_DQSIEN_R0DQS2IEN); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2460: SET32_BITFIELDS(&ch[chn].ao.rk[rnk].pre_tdqsck[7], RK0_PRE_TDQSCK8_TDQSCK_PIFREQ3_B2R0, u4value); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2461: u4value = READ32_BITFIELD(&ch[chn].ao.shu[2].rk[rnk].selph_dqsg0, SHURK0_SELPH_DQSG0_TX_DLY_DQS2_GATED_P1); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2462: u4value1 = READ32_BITFIELD(&ch[chn].ao.shu[2].rk[rnk].selph_dqsg1, SHURK0_SELPH_DQSG1_REG_DLY_DQS2_GATED_P1); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2463: SET32_BITFIELDS(&ch[chn].ao.rk[rnk].pre_tdqsck[8], RK0_PRE_TDQSCK9_TDQSCK_UIFREQ3_P1_B2R0, (u4value << 3) | u4value1); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2467: u4value = READ32_BITFIELD(&ch[chn].ao.shu[0].rk[rnk].selph_dqsg0, SHURK0_SELPH_DQSG0_TX_DLY_DQS3_GATED); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2468: u4value1 = READ32_BITFIELD(&ch[chn].ao.shu[0].rk[rnk].selph_dqsg1, SHURK0_SELPH_DQSG1_REG_DLY_DQS3_GATED); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2469: SET32_BITFIELDS(&ch[chn].ao.rk[rnk].pre_tdqsck[9], RK0_PRE_TDQSCK10_TDQSCK_UIFREQ1_B3R0, (u4value << 3) | u4value1); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2470: u4value = READ32_BITFIELD(&ch[chn].ao.shu[0].rk[rnk].dqsien, SHURK0_DQSIEN_R0DQS3IEN); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2471: SET32_BITFIELDS(&ch[chn].ao.rk[rnk].pre_tdqsck[9], RK0_PRE_TDQSCK10_TDQSCK_PIFREQ1_B3R0, u4value); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2472: u4value = READ32_BITFIELD(&ch[chn].ao.shu[0].rk[rnk].selph_dqsg0, SHURK0_SELPH_DQSG0_TX_DLY_DQS3_GATED_P1); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2473: u4value1 = READ32_BITFIELD(&ch[chn].ao.shu[0].rk[rnk].selph_dqsg1, SHURK0_SELPH_DQSG1_REG_DLY_DQS3_GATED_P1); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2474: SET32_BITFIELDS(&ch[chn].ao.rk[rnk].pre_tdqsck[11], RK0_PRE_TDQSCK12_TDQSCK_UIFREQ1_P1_B3R0, (u4value << 3) | u4value1); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2476: u4value = READ32_BITFIELD(&ch[chn].ao.shu[1].rk[rnk].selph_dqsg0, SHURK0_SELPH_DQSG0_TX_DLY_DQS3_GATED); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2477: u4value1 = READ32_BITFIELD(&ch[chn].ao.shu[1].rk[rnk].selph_dqsg1, SHURK0_SELPH_DQSG1_REG_DLY_DQS3_GATED); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2478: SET32_BITFIELDS(&ch[chn].ao.rk[rnk].pre_tdqsck[9], RK0_PRE_TDQSCK10_TDQSCK_UIFREQ2_B3R0, (u4value << 3) | u4value1); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2479: u4value = READ32_BITFIELD(&ch[chn].ao.shu[1].rk[rnk].dqsien, SHURK0_DQSIEN_R0DQS3IEN); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2480: SET32_BITFIELDS(&ch[chn].ao.rk[rnk].pre_tdqsck[9], RK0_PRE_TDQSCK10_TDQSCK_PIFREQ2_B3R0, u4value); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2481: u4value = READ32_BITFIELD(&ch[chn].ao.shu[1].rk[rnk].selph_dqsg0, SHURK0_SELPH_DQSG0_TX_DLY_DQS3_GATED_P1); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2482: u4value1 = READ32_BITFIELD(&ch[chn].ao.shu[1].rk[rnk].selph_dqsg1, SHURK0_SELPH_DQSG1_REG_DLY_DQS3_GATED_P1); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2483: SET32_BITFIELDS(&ch[chn].ao.rk[rnk].pre_tdqsck[11], RK0_PRE_TDQSCK12_TDQSCK_UIFREQ2_P1_B3R0, (u4value << 3) | u4value1); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2485: u4value = READ32_BITFIELD(&ch[chn].ao.shu[2].rk[rnk].selph_dqsg0, SHURK0_SELPH_DQSG0_TX_DLY_DQS3_GATED); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2486: u4value1 = READ32_BITFIELD(&ch[chn].ao.shu[2].rk[rnk].selph_dqsg1, SHURK0_SELPH_DQSG1_REG_DLY_DQS3_GATED); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2487: SET32_BITFIELDS(&ch[chn].ao.rk[rnk].pre_tdqsck[10], RK0_PRE_TDQSCK11_TDQSCK_UIFREQ3_B3R0, (u4value << 3) | u4value1); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2488: u4value = READ32_BITFIELD(&ch[chn].ao.shu[2].rk[rnk].dqsien, SHURK0_DQSIEN_R0DQS3IEN); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2489: SET32_BITFIELDS(&ch[chn].ao.rk[rnk].pre_tdqsck[10], RK0_PRE_TDQSCK11_TDQSCK_PIFREQ3_B3R0, u4value); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2490: u4value = READ32_BITFIELD(&ch[chn].ao.shu[2].rk[rnk].selph_dqsg0, SHURK0_SELPH_DQSG0_TX_DLY_DQS3_GATED_P1); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2491: u4value1 = READ32_BITFIELD(&ch[chn].ao.shu[2].rk[rnk].selph_dqsg1, SHURK0_SELPH_DQSG1_REG_DLY_DQS3_GATED_P1); line over 96 characters
https://review.coreboot.org/c/coreboot/+/37996/8/src/soc/mediatek/mt8183/dra... PS8, Line 2492: SET32_BITFIELDS(&ch[chn].ao.rk[rnk].pre_tdqsck[11], RK0_PRE_TDQSCK12_TDQSCK_UIFREQ3_P1_B3R0, (u4value << 3) | u4value1); line over 96 characters