Hello Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/48344
to look at the new patch set (#2).
Change subject: soc/intel/common/block/cpu: Introduce USE_CAR_NEM_ENHANCED_V3 Kconfig ......................................................................
soc/intel/common/block/cpu: Introduce USE_CAR_NEM_ENHANCED_V3 Kconfig
List of changes: 1. Default select USE_CAR_NEM_ENHANCED_V1 to use the existing algorithm 2. Select COS_MAPPED_TO_MSB 3. Add new MSR 0xc85 IA32_YMM 4. a. Update eNEM init flow:
- Set MSR 0x1891 IA32_CR_SF_QOS_MASK_1 = 0xFFFFF - (2^(non-eviction mask)-1) - Set MSR 0x1892 IA32_CR_SF_QOS_MASK_2 = (2^(non-eviction mask)-1) - Set MSR 0xC85 L3_Protected_ways = (2^(no. of ways)-1)
b. Update eNEM teardown flow: - Set MSR 0xC85 L3_Protected_ways = 0x00000
This new eNEM flow can be used for ADL SoC.
Change-Id: Idb5a9ec74c50bda371c30e13aeadbb4326887fd6 Signed-off-by: Subrata Banik subrata.banik@intel.com --- M src/include/cpu/x86/msr.h M src/soc/intel/common/block/cpu/Kconfig M src/soc/intel/common/block/cpu/car/cache_as_ram.S M src/soc/intel/common/block/cpu/car/exit_car.S 4 files changed, 52 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/44/48344/2