Raul Rangel has submitted this change. ( https://review.coreboot.org/c/coreboot/+/52056 )
Change subject: soc/amd/common/espi: Clear DNCMD_COMPLETE on completion ......................................................................
soc/amd/common/espi: Clear DNCMD_COMPLETE on completion
Tidy up the interrupt status. This will leave SLAVE0_INT_STS = 0.
BUG=b:183524609 TEST=Boot guybrush to OS
Signed-off-by: Raul E Rangel rrangel@chromium.org Change-Id: I950cfb81521e35758c120a482670cfdb924201d2 Reviewed-on: https://review.coreboot.org/c/coreboot/+/52056 Reviewed-by: Furquan Shaikh furquan@google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/amd/common/block/lpc/espi_util.c 1 file changed, 2 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved
diff --git a/src/soc/amd/common/block/lpc/espi_util.c b/src/soc/amd/common/block/lpc/espi_util.c index fe49fe8..c7269d0 100644 --- a/src/soc/amd/common/block/lpc/espi_util.c +++ b/src/soc/amd/common/block/lpc/espi_util.c @@ -519,6 +519,8 @@ return -1; }
+ espi_write32(ESPI_SLAVE0_INT_STS, ESPI_STATUS_DNCMD_COMPLETE); + return 0; }