Attention is currently required from: Arthur Heymans.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37200 )
Change subject: nb/intel/sandybridge: Cache cbmem and stage cache in romstage
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Patch Set 15:
(1 comment)
File src/northbridge/intel/sandybridge/raminit.c:
https://review.coreboot.org/c/coreboot/+/37200/comment/e9452ba4_567266f8
PS15, Line 466: setup_romstage_wb_cbmem_cache(8 * MiB);
Is this related to memmap.c function `fill_postcar_frame`?
Also, this call is only effective on the native raminit codepath.
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