[coreboot-gerrit] Change in coreboot[master]: soc/tigerlake: Add Device id for Tiger Lake Dual Core

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/38774 )

Change subject: soc/tigerlake: Add Device id for Tiger Lake Dual Core
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soc/tigerlake: Add Device id for Tiger Lake Dual Core

Add device id for Tiger Lake Dual core part.

BUG=b:148965583
BRANCH=none
TEST="emerge-tglrvp coreboot chromeos-bootimage", flash and boot

Change-Id: Ied0cef2fcc8ae6f25949f98f886c4d79f64b54cd
Signed-off-by: Srinidhi N Kaushik 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38774
Tested-by: build bot (Jenkins) 
Reviewed-by: Caveh Jalali 
Reviewed-by: Wonkyu Kim 
Reviewed-by: Nick Vaccaro 
---
M src/include/device/pci_ids.h
M src/soc/intel/common/block/systemagent/systemagent.c
M src/soc/intel/tigerlake/bootblock/report_platform.c
3 files changed, 3 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Nick Vaccaro: Looks good to me, approved
  Srinidhi N Kaushik: Looks good to me, but someone else must approve
  Caveh Jalali: Looks good to me, but someone else must approve
  Wonkyu Kim: Looks good to me, approved

diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h
index e117ac2..c6602c4 100644
--- a/src/include/device/pci_ids.h
+++ b/src/include/device/pci_ids.h
@@ -3445,6 +3445,7 @@
 #define PCI_DEVICE_ID_INTEL_CML_H_8_2		0x9B44
 #define PCI_DEVICE_ID_INTEL_TGL_ID_U		0x9A14
 #define PCI_DEVICE_ID_INTEL_TGL_ID_U_1		0x9A12
+#define PCI_DEVICE_ID_INTEL_TGL_ID_U_2_2	0x9A04
 #define PCI_DEVICE_ID_INTEL_TGL_ID_Y		0x9A10
 #define PCI_DEVICE_ID_INTEL_JSL_PRE_PROD	0x4e2a
 #define PCI_DEVICE_ID_INTEL_JSL_EHL		0x4532
diff --git a/src/soc/intel/common/block/systemagent/systemagent.c b/src/soc/intel/common/block/systemagent/systemagent.c
index 4c7d8c8..e660dbf 100644
--- a/src/soc/intel/common/block/systemagent/systemagent.c
+++ b/src/soc/intel/common/block/systemagent/systemagent.c
@@ -398,6 +398,7 @@
    PCI_DEVICE_ID_INTEL_CML_H_8_2,
    PCI_DEVICE_ID_INTEL_TGL_ID_U,
    PCI_DEVICE_ID_INTEL_TGL_ID_U_1,
+	PCI_DEVICE_ID_INTEL_TGL_ID_U_2_2,
    PCI_DEVICE_ID_INTEL_TGL_ID_Y,
    PCI_DEVICE_ID_INTEL_JSL_PRE_PROD,
    PCI_DEVICE_ID_INTEL_JSL_EHL,
diff --git a/src/soc/intel/tigerlake/bootblock/report_platform.c b/src/soc/intel/tigerlake/bootblock/report_platform.c
index 127994d..f38e9cf 100644
--- a/src/soc/intel/tigerlake/bootblock/report_platform.c
+++ b/src/soc/intel/tigerlake/bootblock/report_platform.c
@@ -46,6 +46,7 @@
 } mch_table[] = {
    { PCI_DEVICE_ID_INTEL_TGL_ID_U, "Tigerlake-U-4-2" },
    { PCI_DEVICE_ID_INTEL_TGL_ID_U_1, "Tigerlake-U-4-3e" },
+	{ PCI_DEVICE_ID_INTEL_TGL_ID_U_2_2, "Tigerlake-U-2-2" },
    { PCI_DEVICE_ID_INTEL_TGL_ID_Y, "Tigerlake-Y-4-2" },
    { PCI_DEVICE_ID_INTEL_JSL_PRE_PROD, "Jasperlake Pre Prod" },
    { PCI_DEVICE_ID_INTEL_JSL_EHL, "Jasperlake Elkhartlake" },