Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46435 )
Change subject: cpu/x86/mtrr: add support for base address bigger than 4GB ......................................................................
Patch Set 2:
(3 comments)
https://review.coreboot.org/c/coreboot/+/46435/2/src/cpu/x86/mtrr/mtrr.c File src/cpu/x86/mtrr/mtrr.c:
https://review.coreboot.org/c/coreboot/+/46435/2/src/cpu/x86/mtrr/mtrr.c@108 PS2, Line 108: 32-bit numbers. comment needs an update since it seems 16TiB of address space is being exceeded.
https://review.coreboot.org/c/coreboot/+/46435/2/src/cpu/x86/mtrr/mtrr.c@119 PS2, Line 119: 1 Change these to ULL
https://review.coreboot.org/c/coreboot/+/46435/2/src/cpu/x86/mtrr/mtrr.c@468 PS2, Line 468: addr_lsb = fls64(base); Why wouldn't you unconditionally call fls64()? And in the implementation split the 64 bit value into 2 32-bit ones using fls()?