Michael Niewöhner has submitted this change. ( https://review.coreboot.org/c/coreboot/+/44032 )
Change subject: soc/intel/skylake: Enable CIO depending on devicetree configuration ......................................................................
soc/intel/skylake: Enable CIO depending on devicetree configuration
Currently, CIO gets enabled by the option Cio2Enable, but this duplicates the devicetree on/off options. Therefore, depend on the devicetree for the enablement of the CIO controller.
All corresponding mainboards were checked if the devicetree configuration matches the Cio2Enable setting, and missing entries were added.
Change-Id: I65e2cceb65add66e3cb3de7071b1a3cc967ab291 Signed-off-by: Felix Singer felixsinger@posteo.net Reviewed-on: https://review.coreboot.org/c/coreboot/+/44032 Reviewed-by: Arthur Heymans arthur@aheymans.xyz Reviewed-by: Michael Niewöhner Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/51nb/x210/devicetree.cb M src/mainboard/facebook/monolith/devicetree.cb M src/mainboard/google/eve/devicetree.cb M src/mainboard/google/fizz/variants/baseboard/devicetree.cb M src/mainboard/google/glados/devicetree.cb M src/mainboard/google/poppy/variants/atlas/devicetree.cb M src/mainboard/google/poppy/variants/baseboard/devicetree.cb M src/mainboard/google/poppy/variants/nami/devicetree.cb M src/mainboard/google/poppy/variants/nautilus/devicetree.cb M src/mainboard/google/poppy/variants/nocturne/devicetree.cb M src/mainboard/google/poppy/variants/rammus/devicetree.cb M src/mainboard/google/poppy/variants/soraka/devicetree.cb M src/mainboard/intel/kblrvp/variants/rvp3/overridetree.cb M src/mainboard/libretrend/lt1000/devicetree.cb M src/mainboard/protectli/vault_kbl/devicetree.cb M src/mainboard/purism/librem_skl/devicetree.cb M src/mainboard/razer/blade_stealth_kbl/devicetree.cb M src/soc/intel/skylake/chip.c M src/soc/intel/skylake/chip.h 19 files changed, 18 insertions(+), 21 deletions(-)
Approvals: build bot (Jenkins): Verified Arthur Heymans: Looks good to me, approved Michael Niewöhner: Looks good to me, approved
diff --git a/src/mainboard/51nb/x210/devicetree.cb b/src/mainboard/51nb/x210/devicetree.cb index b3d9929..294ae44 100644 --- a/src/mainboard/51nb/x210/devicetree.cb +++ b/src/mainboard/51nb/x210/devicetree.cb @@ -49,7 +49,6 @@ register "DspEnable" = "0" register "IoBufferOwnership" = "0" register "SsicPortEnable" = "0" - register "Cio2Enable" = "0" register "ScsEmmcHs400Enabled" = "0" register "PttSwitch" = "0" register "SkipExtGfxScan" = "1" @@ -125,6 +124,7 @@ device pci 14.0 on end # USB xHCI device pci 14.1 off end # USB xDCI (OTG) device pci 14.2 on end # Thermal Subsystem + device pci 14.3 off end # Camera device pci 16.0 on end # Management Engine Interface 1 device pci 16.1 off end # Management Engine Interface 2 device pci 16.2 off end # Management Engine IDE-R diff --git a/src/mainboard/facebook/monolith/devicetree.cb b/src/mainboard/facebook/monolith/devicetree.cb index bede4e3..6078741 100644 --- a/src/mainboard/facebook/monolith/devicetree.cb +++ b/src/mainboard/facebook/monolith/devicetree.cb @@ -39,7 +39,6 @@ register "ScsEmmcHs400Enabled" = "1" register "SkipExtGfxScan" = "1" register "SaGv" = "SaGv_Enabled" - register "Cio2Enable" = "0" register "PmTimerDisabled" = "1" register "HeciEnabled" = "0"
@@ -243,6 +242,7 @@ device pci 14.0 on end # USB xHCI device pci 14.1 on end # USB xDCI (OTG) device pci 14.2 on end # Thermal Subsystem + device pci 14.3 off end # Camera device pci 17.0 on end # SATA device pci 1c.2 on end # PCI Express Port 3 x1 baseboard WWAN device pci 1c.5 on end # PCI Express Port 6 x1 baseboard i210 diff --git a/src/mainboard/google/eve/devicetree.cb b/src/mainboard/google/eve/devicetree.cb index 8d15e8e..b42d917 100644 --- a/src/mainboard/google/eve/devicetree.cb +++ b/src/mainboard/google/eve/devicetree.cb @@ -42,7 +42,6 @@ register "DspEnable" = "1" register "IoBufferOwnership" = "3" register "SsicPortEnable" = "0" - register "Cio2Enable" = "0" register "ScsEmmcHs400Enabled" = "1" register "PttSwitch" = "0" register "SkipExtGfxScan" = "1" @@ -295,6 +294,7 @@ end # USB xHCI device pci 14.1 off end # USB xDCI (OTG) device pci 14.2 on end # Thermal Subsystem + device pci 14.3 off end # Camera device pci 15.0 on chip drivers/i2c/hid register "generic.hid" = ""WCOM50C1"" diff --git a/src/mainboard/google/fizz/variants/baseboard/devicetree.cb b/src/mainboard/google/fizz/variants/baseboard/devicetree.cb index e8412d5..5faf760 100644 --- a/src/mainboard/google/fizz/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/fizz/variants/baseboard/devicetree.cb @@ -73,7 +73,6 @@ register "DspEnable" = "1" register "IoBufferOwnership" = "3" register "SsicPortEnable" = "0" - register "Cio2Enable" = "0" register "ScsEmmcHs400Enabled" = "0" register "PttSwitch" = "0" register "SkipExtGfxScan" = "1" @@ -376,6 +375,7 @@ end # USB xHCI device pci 14.1 off end # USB xDCI (OTG) device pci 14.2 on end # Thermal Subsystem + device pci 14.3 off end # Camera device pci 15.0 on end # I2C #0 device pci 15.1 off end # I2C #1 device pci 15.2 on end # I2C #2 diff --git a/src/mainboard/google/glados/devicetree.cb b/src/mainboard/google/glados/devicetree.cb index 108470b..98b678a 100644 --- a/src/mainboard/google/glados/devicetree.cb +++ b/src/mainboard/google/glados/devicetree.cb @@ -44,7 +44,6 @@ register "DspEnable" = "1" register "IoBufferOwnership" = "3" register "SsicPortEnable" = "0" - register "Cio2Enable" = "0" register "ScsEmmcHs400Enabled" = "1" register "PttSwitch" = "0" register "SkipExtGfxScan" = "1" @@ -104,6 +103,7 @@ device pci 14.0 on end # USB xHCI device pci 14.1 off end # USB xDCI (OTG) device pci 14.2 on end # Thermal Subsystem + device pci 14.3 off end # Camera device pci 15.0 on end # I2C #0 device pci 15.1 on end # I2C #1 device pci 15.2 off end # I2C #2 diff --git a/src/mainboard/google/poppy/variants/atlas/devicetree.cb b/src/mainboard/google/poppy/variants/atlas/devicetree.cb index 9486147..ce725f6 100644 --- a/src/mainboard/google/poppy/variants/atlas/devicetree.cb +++ b/src/mainboard/google/poppy/variants/atlas/devicetree.cb @@ -48,7 +48,6 @@ register "DspEnable" = "1" register "IoBufferOwnership" = "3" register "SsicPortEnable" = "0" - register "Cio2Enable" = "1" register "ScsEmmcHs400Enabled" = "1" register "PttSwitch" = "0" register "SkipExtGfxScan" = "1" @@ -274,6 +273,7 @@ end # USB xHCI device pci 14.1 on end # USB xDCI (OTG) device pci 14.2 on end # Thermal Subsystem + device pci 14.3 on end # Camera device pci 15.0 on chip drivers/i2c/hid register "generic.hid" = ""ACPI0C50"" diff --git a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb index e672940..3197288 100644 --- a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb @@ -38,7 +38,6 @@ register "DspEnable" = "1" register "IoBufferOwnership" = "3" register "SsicPortEnable" = "0" - register "Cio2Enable" = "1" register "ScsEmmcHs400Enabled" = "1" register "PttSwitch" = "0" register "SkipExtGfxScan" = "1" @@ -270,6 +269,7 @@ device pci 14.0 on end # USB xHCI device pci 14.1 on end # USB xDCI (OTG) device pci 14.2 on end # Thermal Subsystem + device pci 14.3 on end # Camera device pci 15.0 on chip drivers/i2c/generic register "hid" = ""ELAN0001"" diff --git a/src/mainboard/google/poppy/variants/nami/devicetree.cb b/src/mainboard/google/poppy/variants/nami/devicetree.cb index 7ee3116..57444a9 100644 --- a/src/mainboard/google/poppy/variants/nami/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nami/devicetree.cb @@ -37,7 +37,6 @@ register "DspEnable" = "1" register "IoBufferOwnership" = "3" register "SsicPortEnable" = "0" - register "Cio2Enable" = "0" register "ScsEmmcHs400Enabled" = "1" register "PttSwitch" = "0" register "SkipExtGfxScan" = "1" @@ -285,6 +284,7 @@ device pci 14.0 on end # USB xHCI device pci 14.1 on end # USB xDCI (OTG) device pci 14.2 on end # Thermal Subsystem + device pci 14.3 off end # Camera device pci 15.0 on chip drivers/i2c/generic register "hid" = ""ELAN0001"" diff --git a/src/mainboard/google/poppy/variants/nautilus/devicetree.cb b/src/mainboard/google/poppy/variants/nautilus/devicetree.cb index c454348..025b82b 100644 --- a/src/mainboard/google/poppy/variants/nautilus/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nautilus/devicetree.cb @@ -38,7 +38,6 @@ register "DspEnable" = "1" register "IoBufferOwnership" = "3" register "SsicPortEnable" = "0" - register "Cio2Enable" = "1" register "ScsEmmcHs400Enabled" = "1" register "PttSwitch" = "0" register "SkipExtGfxScan" = "1" @@ -291,6 +290,7 @@ device pci 14.0 on end # USB xHCI device pci 14.1 on end # USB xDCI (OTG) device pci 14.2 on end # Thermal Subsystem + device pci 14.3 on end # Camera device pci 15.0 on chip drivers/i2c/hid register "generic.hid" = ""SYTS7813"" diff --git a/src/mainboard/google/poppy/variants/nocturne/devicetree.cb b/src/mainboard/google/poppy/variants/nocturne/devicetree.cb index aef571a..3606ae2 100644 --- a/src/mainboard/google/poppy/variants/nocturne/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nocturne/devicetree.cb @@ -43,7 +43,6 @@ register "DspEnable" = "1" register "IoBufferOwnership" = "3" register "SsicPortEnable" = "0" - register "Cio2Enable" = "1" register "ScsEmmcHs400Enabled" = "1" register "PttSwitch" = "0" register "SkipExtGfxScan" = "1" @@ -298,6 +297,7 @@ end # USB xHCI device pci 14.1 on end # USB xDCI (OTG) device pci 14.2 on end # Thermal Subsystem + device pci 14.3 on end # Camera device pci 15.0 on chip drivers/i2c/hid register "generic.hid" = ""WCOM50C1"" diff --git a/src/mainboard/google/poppy/variants/rammus/devicetree.cb b/src/mainboard/google/poppy/variants/rammus/devicetree.cb index d21f984..3587cda 100644 --- a/src/mainboard/google/poppy/variants/rammus/devicetree.cb +++ b/src/mainboard/google/poppy/variants/rammus/devicetree.cb @@ -48,7 +48,6 @@ register "DspEnable" = "1" register "IoBufferOwnership" = "3" register "SsicPortEnable" = "0" - register "Cio2Enable" = "0" register "ScsEmmcHs400Enabled" = "1" register "PttSwitch" = "0" register "SkipExtGfxScan" = "1" @@ -282,6 +281,7 @@ end # USB xHCI device pci 14.1 on end # USB xDCI (OTG) device pci 14.2 on end # Thermal Subsystem + device pci 14.3 off end # Camera device pci 15.0 on chip drivers/i2c/hid register "generic.hid" = ""PNP0C50"" diff --git a/src/mainboard/google/poppy/variants/soraka/devicetree.cb b/src/mainboard/google/poppy/variants/soraka/devicetree.cb index 64ef501..2bddae2 100644 --- a/src/mainboard/google/poppy/variants/soraka/devicetree.cb +++ b/src/mainboard/google/poppy/variants/soraka/devicetree.cb @@ -38,7 +38,6 @@ register "DspEnable" = "1" register "IoBufferOwnership" = "3" register "SsicPortEnable" = "0" - register "Cio2Enable" = "1" register "ScsEmmcHs400Enabled" = "1" register "PttSwitch" = "0" register "SkipExtGfxScan" = "1" @@ -271,6 +270,7 @@ device pci 14.0 on end # USB xHCI device pci 14.1 on end # USB xDCI (OTG) device pci 14.2 on end # Thermal Subsystem + device pci 14.3 on end # Camera device pci 15.0 on chip drivers/i2c/hid register "generic.hid" = ""WCOMCOHO"" diff --git a/src/mainboard/intel/kblrvp/variants/rvp3/overridetree.cb b/src/mainboard/intel/kblrvp/variants/rvp3/overridetree.cb index fe5edbe..4bcfc99 100644 --- a/src/mainboard/intel/kblrvp/variants/rvp3/overridetree.cb +++ b/src/mainboard/intel/kblrvp/variants/rvp3/overridetree.cb @@ -9,7 +9,6 @@ # FSP Configuration register "DspEnable" = "1" register "PmTimerDisabled" = "1" - register "Cio2Enable" = "1"
# VR Settings Configuration for 4 Domains #+----------------+-------+-------+-------+-------+ @@ -121,6 +120,7 @@
device domain 0 on device pci 05.0 on end # SA IMGU + device pci 14.3 on end # Camera device pci 1c.0 on end # PCI Express Port 1 x4 SLOT1 device pci 1c.4 on end # PCI Express Port 5 x1 SLOT2/LAN device pci 1c.5 on end # PCI Express Port 6 x1 SLOT3 diff --git a/src/mainboard/libretrend/lt1000/devicetree.cb b/src/mainboard/libretrend/lt1000/devicetree.cb index 91552a2..d47eca8 100644 --- a/src/mainboard/libretrend/lt1000/devicetree.cb +++ b/src/mainboard/libretrend/lt1000/devicetree.cb @@ -50,7 +50,6 @@ register "DspEnable" = "1" register "IoBufferOwnership" = "0" register "SsicPortEnable" = "0" - register "Cio2Enable" = "0" register "ScsEmmcHs400Enabled" = "0" register "SkipExtGfxScan" = "1" register "HeciEnabled" = "1" @@ -176,6 +175,7 @@ device pci 14.0 on end # USB xHCI device pci 14.1 on end # USB xDCI (OTG) device pci 14.2 on end # Thermal Subsystem + device pci 14.3 off end # Camera device pci 16.0 on end # Management Engine Interface 1 device pci 16.1 off end # Management Engine Interface 2 device pci 16.2 off end # Management Engine IDE-R diff --git a/src/mainboard/protectli/vault_kbl/devicetree.cb b/src/mainboard/protectli/vault_kbl/devicetree.cb index f0759ef..a5b3638 100644 --- a/src/mainboard/protectli/vault_kbl/devicetree.cb +++ b/src/mainboard/protectli/vault_kbl/devicetree.cb @@ -39,7 +39,6 @@ register "DspEnable" = "0" register "IoBufferOwnership" = "0" register "SsicPortEnable" = "0" - register "Cio2Enable" = "0" register "ScsEmmcHs400Enabled" = "0" register "SkipExtGfxScan" = "1" register "HeciEnabled" = "1" diff --git a/src/mainboard/purism/librem_skl/devicetree.cb b/src/mainboard/purism/librem_skl/devicetree.cb index 60f69c8..23c5712 100644 --- a/src/mainboard/purism/librem_skl/devicetree.cb +++ b/src/mainboard/purism/librem_skl/devicetree.cb @@ -55,7 +55,6 @@ register "DspEnable" = "0" register "IoBufferOwnership" = "0" register "SsicPortEnable" = "0" - register "Cio2Enable" = "0" register "ScsEmmcHs400Enabled" = "0" register "PttSwitch" = "0" register "SkipExtGfxScan" = "1" @@ -173,6 +172,7 @@ device pci 14.0 on end # USB xHCI device pci 14.1 on end # USB xDCI (OTG) device pci 14.2 on end # Thermal Subsystem + device pci 14.3 off end # Camera device pci 16.0 on end # Management Engine Interface 1 device pci 16.1 off end # Management Engine Interface 2 device pci 16.2 off end # Management Engine IDE-R diff --git a/src/mainboard/razer/blade_stealth_kbl/devicetree.cb b/src/mainboard/razer/blade_stealth_kbl/devicetree.cb index 6217de5..edf1333 100644 --- a/src/mainboard/razer/blade_stealth_kbl/devicetree.cb +++ b/src/mainboard/razer/blade_stealth_kbl/devicetree.cb @@ -35,7 +35,6 @@ register "DspEnable" = "0" register "IoBufferOwnership" = "0" register "SsicPortEnable" = "0" - register "Cio2Enable" = "0" register "ScsEmmcHs400Enabled" = "0" register "PttSwitch" = "0" register "SkipExtGfxScan" = "1" @@ -192,6 +191,7 @@ device pci 14.0 on end # USB xHCI device pci 14.1 off end # USB xDCI (OTG) device pci 14.2 on end # Thermal Subsystem + device pci 14.3 off end # Camera device pci 15.0 on end # I2C Controller #0 device pci 15.1 on chip drivers/i2c/hid diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c index 80e89f6..9239fd2 100644 --- a/src/soc/intel/skylake/chip.c +++ b/src/soc/intel/skylake/chip.c @@ -229,7 +229,8 @@ memcpy(params->SerialIoDevMode, config->SerialIoDevMode, sizeof(params->SerialIoDevMode));
- params->PchCio2Enable = config->Cio2Enable; + dev = pcidev_path_on_root(PCH_DEVFN_CIO); + params->PchCio2Enable = dev && dev->enabled;
dev = pcidev_path_on_root(SA_DEVFN_IMGU); params->SaImguEnable = dev && dev->enabled; diff --git a/src/soc/intel/skylake/chip.h b/src/soc/intel/skylake/chip.h index 33fe52c..b1cf4dc 100644 --- a/src/soc/intel/skylake/chip.h +++ b/src/soc/intel/skylake/chip.h @@ -300,9 +300,6 @@ /* Bus voltage level, default is 3.3V */ enum skylake_i2c_voltage i2c_voltage[CONFIG_SOC_INTEL_I2C_DEV_MAX];
- /* Camera */ - u8 Cio2Enable; - /* eMMC and SD */ u8 ScsEmmcHs400Enabled; u8 EmmcHs400DllNeed;