Mike Banon has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47848 )
Change subject: sb/amd/agesa/hudson: define macros for GNB and IOMMU devices ......................................................................
sb/amd/agesa/hudson: define macros for GNB and IOMMU devices
Following the example of newer AMD code for Stoneyridge and Picasso.
Signed-off-by: Mike Banon mikebdp2@gmail.com Change-Id: I9c17d4cb4953b28a47483f5d7db308ccc89e9281 --- M src/southbridge/amd/agesa/hudson/pci_devs.h 1 file changed, 10 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/47848/1
diff --git a/src/southbridge/amd/agesa/hudson/pci_devs.h b/src/southbridge/amd/agesa/hudson/pci_devs.h index d67395c..f8a4ca8 100644 --- a/src/southbridge/amd/agesa/hudson/pci_devs.h +++ b/src/southbridge/amd/agesa/hudson/pci_devs.h @@ -7,6 +7,16 @@
#define BUS0 0
+/* GNB Root Complex */ +#define GNB_DEV 0x0 +#define GNB_FUNC 0 +#define GNB_DEVFN PCI_DEVFN(GNB_DEV, GNB_FUNC) + +/* IOMMU */ +#define IOMMU_DEV 0x0 +#define IOMMU_FUNC 2 +#define IOMMU_DEVFN PCI_DEVFN(IOMMU_DEV, IOMMU_FUNC) + /* XHCI */ #define XHCI_DEV 0x10 #define XHCI_FUNC 0