[coreboot-gerrit] Change in coreboot[master]: soc/skylake: Write the P2SB IBDF and HBDF registers in coreboot

[Angel Pons (Code Review)]

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35170 )

Change subject: soc/skylake: Write the P2SB IBDF and HBDF registers in coreboot
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Patch Set 6:
> Patch Set 6: Code-Review+1
>
> Still not sure if this is worth the hassle. If you write the registers
> before FSP runs, we can't align it with newer platforms (that don't have
> the UPD and would probably overwrite our choice). Unless the registers
> are R/WO, ofc, who knows?

The registers are RW and the values that get programmed into it match those in the reference documentation. Moreover, I'm not sure if aligning the interfaces of different FSP binaries is worth the hassle either. I'd rather try aligning code that directly does things to the hardware.