Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44015 )
Change subject: arch/x86/smbios: Bump to version 3.2 ......................................................................
arch/x86/smbios: Bump to version 3.2
Add new fields for type 17 and fill it with valid data. Rename configured_clock_speed to configured_memory_speed in type 17.
All other structs and enums are already up to date.
Change-Id: Iae56ad6bcde76ed25dc678b7bfed3b330ceaa77e Signed-off-by: Patrick Rudolph patrick.rudolph@9elements.com --- M src/arch/x86/smbios.c M src/include/smbios.h M src/mainboard/emulation/qemu-i440fx/northbridge.c M src/mainboard/pcengines/apu1/mainboard.c M src/mainboard/pcengines/apu2/mainboard.c 5 files changed, 31 insertions(+), 7 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/44015/1
diff --git a/src/arch/x86/smbios.c b/src/arch/x86/smbios.c index be51075..700de23 100644 --- a/src/arch/x86/smbios.c +++ b/src/arch/x86/smbios.c @@ -317,7 +317,7 @@ memset(t, 0, sizeof(struct smbios_type17)); t->memory_type = dimm->ddr_type; /* Memory speed is in MT/s */ - t->configured_clock_speed = dimm->ddr_frequency * 2; + t->configured_memory_speed = dimm->ddr_frequency * 2; t->speed = dimm->ddr_frequency * 2;
t->type = SMBIOS_MEMORY_DEVICE; @@ -366,6 +366,19 @@ /* no handle for error information */ t->memory_error_information_handle = 0xFFFE; t->attributes = dimm->rank_per_dimm; + + t->memory_technology = MEMORY_TECHNOLOGY_DRAM; + t->operating_mode_capability = MEMORY_OPERATING_MODE_CAP_UNKNOWN; + t->fw_version = smbios_add_string(t->eos, ""); + t->manufacturer_id = dimm->mod_id; + t->product_id = 0x0000; + t->sub_ctrl_manufacturer_id = 0x0000; + t->sub_ctrl_product_id = 0x0000; + t->non_volatile_size = ~0ULL; + t->volatile_size = ~0UL; + t->cache_size = ~0UL; + t->logical_size = ~0UL; + t->handle = *handle; *handle += 1; t->length = sizeof(struct smbios_type17) - 2; @@ -1376,7 +1389,7 @@ memcpy(se->anchor, "_SM_", 4); se->length = sizeof(struct smbios_entry); se->major_version = 3; - se->minor_version = 1; + se->minor_version = 2; se->max_struct_size = max_struct_size; se->struct_count = handle; memcpy(se->intermediate_anchor_string, "_DMI_", 5); @@ -1394,7 +1407,7 @@ memcpy(se3->anchor, "_SM3_", 5); se3->length = sizeof(struct smbios_entry30); se3->major_version = 3; - se3->minor_version = 1; + se3->minor_version = 2; se3->entry_point_rev = 1;
se3->struct_table_address = (u64)tables; diff --git a/src/include/smbios.h b/src/include/smbios.h index cb354f7..aee81be 100644 --- a/src/include/smbios.h +++ b/src/include/smbios.h @@ -842,10 +842,21 @@ u8 part_number; u8 attributes; u32 extended_size; - u16 configured_clock_speed; + u16 configured_memory_speed; u16 minimum_voltage; u16 maximum_voltage; u16 configured_voltage; + u8 memory_technology; + u16 operating_mode_capability; + u8 fw_version; + u16 manufacturer_id; + u16 product_id; + u16 sub_ctrl_manufacturer_id; + u16 sub_ctrl_product_id; + u64 non_volatile_size; + u64 volatile_size; + u64 cache_size; + u64 logical_size; u8 eos[2]; } __packed;
diff --git a/src/mainboard/emulation/qemu-i440fx/northbridge.c b/src/mainboard/emulation/qemu-i440fx/northbridge.c index 48f88d3..d7c96a4 100644 --- a/src/mainboard/emulation/qemu-i440fx/northbridge.c +++ b/src/mainboard/emulation/qemu-i440fx/northbridge.c @@ -197,7 +197,7 @@ t->memory_type = MEMORY_TYPE_DDR; t->type_detail = MEMORY_TYPE_DETAIL_SYNCHRONOUS; t->speed = 400; - t->configured_clock_speed = 400; + t->configured_memory_speed = 400; t->manufacturer = smbios_add_string(t->eos, CONFIG_MAINBOARD_VENDOR); len = t->length + smbios_string_table_len(t->eos); *current += len; diff --git a/src/mainboard/pcengines/apu1/mainboard.c b/src/mainboard/pcengines/apu1/mainboard.c index 3c7f2f7..0f5fce3 100644 --- a/src/mainboard/pcengines/apu1/mainboard.c +++ b/src/mainboard/pcengines/apu1/mainboard.c @@ -222,7 +222,7 @@ t->part_number = smbios_add_string(t->eos, agesa_dmi->T17[0][0][0].PartNumber); t->attributes = agesa_dmi->T17[0][0][0].Attributes; t->extended_size = agesa_dmi->T17[0][0][0].ExtSize; - t->configured_clock_speed = agesa_dmi->T17[0][0][0].ConfigSpeed * 2; + t->configured_memory_speed = agesa_dmi->T17[0][0][0].ConfigSpeed * 2; t->minimum_voltage = 1500; /* From SPD: 1.5V */ t->maximum_voltage = 1500;
diff --git a/src/mainboard/pcengines/apu2/mainboard.c b/src/mainboard/pcengines/apu2/mainboard.c index 531fcd0..6326b97 100644 --- a/src/mainboard/pcengines/apu2/mainboard.c +++ b/src/mainboard/pcengines/apu2/mainboard.c @@ -208,7 +208,7 @@ agesa_dmi->T17[0][0][0].PartNumber); t->attributes = agesa_dmi->T17[0][0][0].Attributes; t->extended_size = agesa_dmi->T17[0][0][0].ExtSize; - t->configured_clock_speed = agesa_dmi->T17[0][0][0].ConfigSpeed * 2; + t->configured_memory_speed = agesa_dmi->T17[0][0][0].ConfigSpeed * 2; t->minimum_voltage = 1500; /* From SPD: 1.5V */ t->maximum_voltage = 1500;