Keith Hui has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41459 )
Change subject: mb/asus/p2b: list all unused Super I/O resources ......................................................................
Patch Set 8:
(1 comment)
File src/mainboard/asus/p2b/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/41459/comment/e3cbebfe_fc7ef156 PS8, Line 38: io 0x60 = 0 : io 0x62 = 0
It just sounds like something that happens to work because our infrastructure […]
We already have syntax to disable that resource:
device pnp 3f0.7 off
However, on this board, when on OEM firmware, this device is enabled with an unassigned port (registers 0x30=1, 0x60=0, 0x62=0), hence the zero. The I/O port setting here is meant to provide a port where the chip's GPIO pins can be accessed directly, but the GPIO1x pins are completely unused as far as I can see, yet I'm unsure if disabling outright would break anything. It's therefore so configured to match OEM.