[coreboot-gerrit] Change in coreboot[master]: sb/intel/bd82x6x: Fix 16-bit read/write PCI_COMMAND register

[HAOUAS Elyes (Code Review)]

Hello build bot (Jenkins), Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/40807

to look at the new patch set (#3).

Change subject: sb/intel/bd82x6x: Fix 16-bit read/write PCI_COMMAND register
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sb/intel/bd82x6x: Fix 16-bit read/write PCI_COMMAND register

Change-Id: I1589fd8df4ec0fcdcde283513734dfd8458df2f7
Signed-off-by: Elyes HAOUAS 
---
M src/southbridge/intel/bd82x6x/azalia.c
M src/southbridge/intel/bd82x6x/early_usb_mrc.c
M src/southbridge/intel/bd82x6x/me.c
M src/southbridge/intel/bd82x6x/me_8.x.c
M src/southbridge/intel/bd82x6x/pch.c
M src/southbridge/intel/bd82x6x/pcie.c
M src/southbridge/intel/bd82x6x/smihandler.c
M src/southbridge/intel/bd82x6x/usb_ehci.c
8 files changed, 32 insertions(+), 52 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/40807/3