[coreboot-gerrit] Change in coreboot[master]: soc/intel/tigerlake: Add Acoustic features

[Shaunak Saha (Code Review)]

Hello build bot (Jenkins), Furquan Shaikh, Wonkyu Kim, Caveh Jalali, Eric Herrmann, Tim Wawrzynczak, Duncan Laurie, Nick Vaccaro, Srinidhi N Kaushik, Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/45052

to look at the new patch set (#10).

Change subject: soc/intel/tigerlake: Add Acoustic features
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soc/intel/tigerlake: Add Acoustic features

Expose the following FSP UPD interface into coreboot:
- AcousticNoiseMitigation
- FastPkgCRampDisable
- SlowSlewRateFor

BUG=b:153015585
BRANCH=none
TEST= Measure the change in noise level by changing the UPD values.

Signed-off-by: Shaunak Saha 
Change-Id: I1924a3bac8beb16a9d841891696f9a3dea0d425f
---
M src/soc/intel/tigerlake/chip.h
M src/soc/intel/tigerlake/fsp_params.c
2 files changed, 61 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/45052/10