Martin Roth has submitted this change and it was merged. ( https://review.coreboot.org/19862 )
Change subject: mb/lenovo/*60: Remove not existing DIMMs from SPD map ......................................................................
mb/lenovo/*60: Remove not existing DIMMs from SPD map
Should result in a tiny speed bump in raminit since those addresses are not checked for present DIMMs.
Checked in schematics of both Thinkpad X60 and T60 and tested to configure raminit correctly for all DIMMs populated on X60.
Change-Id: I56c4f3176541bc75a8de3aac9f87526a77fc819b Signed-off-by: Arthur Heymans arthur@aheymans.xyz Reviewed-on: https://review.coreboot.org/19862 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Paul Menzel paulepanter@users.sourceforge.net Reviewed-by: Patrick Rudolph siro@das-labor.org --- M src/mainboard/lenovo/t60/romstage.c M src/mainboard/lenovo/x60/romstage.c 2 files changed, 2 insertions(+), 2 deletions(-)
Approvals: Patrick Rudolph: Looks good to me, approved Paul Menzel: Looks good to me, but someone else must approve build bot (Jenkins): Verified
diff --git a/src/mainboard/lenovo/t60/romstage.c b/src/mainboard/lenovo/t60/romstage.c index cb3f8bc..80b989f 100644 --- a/src/mainboard/lenovo/t60/romstage.c +++ b/src/mainboard/lenovo/t60/romstage.c @@ -172,7 +172,7 @@ { int s3resume = 0; int dock_err; - const u8 spd_addrmap[2 * DIMM_SOCKETS] = { 0x50, 0x52, 0x51, 0x53 }; + const u8 spd_addrmap[2 * DIMM_SOCKETS] = { 0x50, 0, 0x51, 0 };
timestamp_init(get_initial_timestamp()); diff --git a/src/mainboard/lenovo/x60/romstage.c b/src/mainboard/lenovo/x60/romstage.c index 51624a0..eddb150 100644 --- a/src/mainboard/lenovo/x60/romstage.c +++ b/src/mainboard/lenovo/x60/romstage.c @@ -171,7 +171,7 @@ void mainboard_romstage_entry(unsigned long bist) { int s3resume = 0; - const u8 spd_addrmap[2 * DIMM_SOCKETS] = { 0x50, 0x52, 0x51, 0x53 }; + const u8 spd_addrmap[2 * DIMM_SOCKETS] = { 0x50, 0, 0x51, 0 };
timestamp_init(get_initial_timestamp());