Maxim Polyakov has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36381 )
Change subject: mb/asrock/h110m: use SSDT generator for SuperIO ......................................................................
Patch Set 3:
Thanks for the review
Patch Set 2: Code-Review+1
The code generating the errors was written by Intel TM without knownledge how hardware works. If the LPC decode ranges were correct before using the superio ssdtgen you can ignore the warnings.
Do you mean LPC IO ranges that are set using genX_dec in https://github.com/coreboot/coreboot/blob/master/src/soc/intel/skylake/lpc.c... ?
ouch, do they try to use programmable lpc io decode ranges for components using the fixed function lpd io range decodes?! if so, this should be fixed...
the patch itself looks good to me