Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37328 )
Change subject: sb/amd/cimx: replace cimx_util with common ACPIMMIO AMD block ......................................................................
Patch Set 1:
(4 comments)
https://review.coreboot.org/c/coreboot/+/37328/1/src/mainboard/amd/inagua/ma... File src/mainboard/amd/inagua/mainboard.c:
https://review.coreboot.org/c/coreboot/+/37328/1/src/mainboard/amd/inagua/ma... PS1, Line 66: pm_write8(0x29, 0x80);
To use pm_writeX over pm_iowriteX sounds good, but you need to verify the ACPIMMIO region for PM exi […]
Checked that already in RRG and it is enabled in the southbridge initialization in romcc bootblock
https://review.coreboot.org/c/coreboot/+/37328/1/src/mainboard/pcengines/apu... File src/mainboard/pcengines/apu1/gpio_ftns.c:
https://review.coreboot.org/c/coreboot/+/37328/1/src/mainboard/pcengines/apu... PS1, Line 37: *memptr = iomux_ftn;
MMIO needs to use read/writeX(). […]
Ack
https://review.coreboot.org/c/coreboot/+/37328/1/src/mainboard/pcengines/apu... PS1, Line 48: u8 *memptr = (u8 *)(base_addr + GPIO_OFFSET + gpio);
Like above.
Ack
https://review.coreboot.org/c/coreboot/+/37328/1/src/southbridge/amd/cimx/ci... File src/southbridge/amd/cimx/cimx_util.h:
https://review.coreboot.org/c/coreboot/+/37328/1/src/southbridge/amd/cimx/ci... PS1, Line 26: #define PM_DATA 0xcd7
If you have interest, grep source for remaining cases of 0xcd6/0xcd7 manipulations.
Yes, I do. Wanted to gradually replace PM and ACPIMMIO accesses.