Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/43492 )
Change subject: mb/amd/mandolin: fix DXIO lane numbers ......................................................................
mb/amd/mandolin: fix DXIO lane numbers
The DXIO descriptors use the logical and not the physical lane numbers, which are different.
Change-Id: I7a90056d782d8d32fe34a0f5bdb61c3b61df1af8 Signed-off-by: Felix Held felix-coreboot@felixheld.de Reviewed-on: https://review.coreboot.org/c/coreboot/+/43492 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Angel Pons th3fanbus@gmail.com --- M src/mainboard/amd/mandolin/variants/mandolin/port_descriptors.c 1 file changed, 6 insertions(+), 6 deletions(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved
diff --git a/src/mainboard/amd/mandolin/variants/mandolin/port_descriptors.c b/src/mainboard/amd/mandolin/variants/mandolin/port_descriptors.c index d8969b2..87cb6b6 100644 --- a/src/mainboard/amd/mandolin/variants/mandolin/port_descriptors.c +++ b/src/mainboard/amd/mandolin/variants/mandolin/port_descriptors.c @@ -60,8 +60,8 @@ { /* WWAN */ .port_present = true, .engine_type = PCIE_ENGINE, - .start_lane = 2, - .end_lane = 2, + .start_lane = 6, + .end_lane = 6, .device_number = 1, .function_number = 4, .link_aspm = ASPM_L1, @@ -73,8 +73,8 @@ { /* WIFI */ .port_present = true, .engine_type = PCIE_ENGINE, - .start_lane = 3, - .end_lane = 3, + .start_lane = 7, + .end_lane = 7, .gpio_group_id = 1, .device_number = 1, .function_number = 5, @@ -87,8 +87,8 @@ { /* SATA EXPRESS */ .port_present = true, .engine_type = SATA_ENGINE, - .start_lane = 6, - .end_lane = 7, + .start_lane = 2, + .end_lane = 3, .gpio_group_id = 1, .channel_type = SATA_CHANNEL_LONG, }